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ST72771R6Q1 bảng dữ liệu(PDF) 2 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  8-BIT USB MCU FOR MONITORS WITH UP TO 60K ROM, 2K RAM, ADC, TIMER, INFRA RED, SYNC, PWM/BRM, DDC/DMA, I2C & SCI
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ST7277
1 GENERAL DESCRIPTION
1.1 INTRODUCTION
The ST7277 is a HCMOS microcontroller unit
(MCU) from the ST7 family with dedicated periph-
erals for Monitor applications.
It is based around an industry standard 8-bit core
and offers an enhanced instruction set. The proc-
essor runs with an external clock at 24 MHz with
a 5V supply. Due to the fully static design of this
device, operation down to DC is possible. Under
software control the ST7277 can be placed in
WAIT or HALT mode thus reducing power con-
sumption. The enhanced instruction set and ad-
dressing modes afford real programming potential.
In addition to standard 8-bit data management the
ST7 features true bit manipulation, 8x8 unsigned
multiplication and indirect addressing modes.
The device includes an on-chip oscillator, CPU,
Sync Processor for video timing & Vfback analy-
sis, up to 60K ROM, up to 2K RAM, USB/DMA, I/
O, a timer with 2 input captures and 2 output com-
pares, an 8-channel Analog to Digital Converter,
DDC/DMA, I2C multi Master, SCI Serial Communi-
cations Interface, Watchdog Reset, an Infra Red
Control preprocessor, and one 12-bit and eight 10-
bit PWM/BRM outputs for analog DC control of ex-
ternal functions.
Figure 1. ST7277 Block Diagram
SYNC
PROCESSOR
POWER
SUPPLY
OSC /3 or 6
VDD
PO RT A
PORT C
DDC
TIMER
W ATCHDOG
PORT D
OCMP
PW M/BRM
PORT B
ADC
AIN 0-AIN7
DA0
60K Bytes
RAM
2K Bytes
USB
SIE
CONTROL
8-BIT CO RE
ALU
INTERNAL
CLOCK
VSS
OSCOUT
OSCIN
DA1,DA8
DDC DMA
PORT C
SCL D
SDAD
I C
INFRA RED
USB DMA
SCI
(UART)
VR01735Q
PA0-PA6 PA7/BLANKOUT
VDDA
VSS A
PC3/SDAD
PC2/RX/SCLD
PC0/O CMP/HFBACK
RESET
HSYNCI1
VSYN CI1
PB1..7/AIN1..7
VFBAC K/AIN0
PC1/HSYN CI2
PC4/SCLI
PC5/SDAI
PC6/RD I
PC7/TDO
IR IN
USBVCC
USBDP
USBDM
USBGND
POWER ON/OFF
TDO
ROM
Up to
Up to
PB 0/
PD0/CSYNCI
PD1/HSYNCO
PD2/VSYNCO
PD3/ITC
PD4/ITB
PD5/ITA
PD6/CLAMPOUT
PD7/VSYNCI2



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