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ST10F280-JT3 bảng dữ liệu(PDF) 60 Page - STMicroelectronics |
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ST10F280-JT3 bảng dữ liệu(HTML) 60 Page - STMicroelectronics |
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60 / 186 page ![]() ST10F280 60/186 11 - PWM MODULE 11.1 - Standard PWM Module The pulse width modulation module can generate up to four PWM output signals using edge-aligned or centre-aligned PWM. In addition, the PWM module can generate PWM burst signals and single shot outputs. The Table 13 shows the PWM frequencies for different resolutions. The level of the output signals is selectable and the PWM module can generate interrupt requests. Figure 17 : Block Diagram of PWM Module Table 13 : PWM Unit Frequencies and Resolution at 40MHz CPU Clock Mode 0 Resolution 8-bit 10-bit 12-bit 14-bit 16-bit CPU Clock/1 25ns 156.25kHz 39.06kHz 9.77kHz 2.44Hz 610.35Hz CPU Clock/64 1.6 µs 2.44Hz 610.35Hz 152.58Hz 38.15Hz 9.54Hz Mode 1 Resolution 8-bit 10-bit 12-bit 14-bit 16-bit CPU Clock/1 25ns 78.12kHz 19.53kHz 4.88kHz 1.22kHz 305.17Hz CPU Clock/64 1.6 µs 1.22kHz 305.17Hz 76.29Hz 19.07Hz 4.77Hz PPx Period Register Comparator PTx 16-bit Up/Down Counter Shadow Register PWx Pulse Width Register Input Run Control Clock 1 Clock 2 Comparator * * * Up/Down/ Clear Control Match Output Control Match Write Control * User readable / writeable register Enable POUTx |
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