PSD511B1 datasheet(130/153 Pages) STMICROELECTRONICS

130 / 153 page

PSD5XX Family

127

-20

-25

ZPLD_TURBO

Symbol

Parameter

Conditions

Min

Max

Min

Max

OFF

Unit

tIVIV

Interrupt Request Input to

Interrupt Output

(Note 3)

120

tRXIX

Read Vector to Interrupt

Request Clear

100

tILIL

Interrupt Request Minimum

Pulse Width

tRLQV

RD to Data Valid Interrupt

Controller

(Note 1)

-20

-25

ZPLD_TURBO

Symbol

Parameter

Conditions

Min

Max

Min

Max

OFF

Unit

fMAX

Maximum Frequency

20.00

12.50

MHz

tCHCL

Clock High Time

tCLCH

Clock Low Time

tCHPV

Clock to Output Delay

tCHPV1

Clock to Watchdog Output Delay

100

Add 20

tLVCH

Input Setup Time Relative

Add 20

to Rising Level Clock

Any Input

(Note 2)

tMIN

Minimum Clock Period

1/fMAX

NOTES: 1. Read to Data Valid of the Interrupt Request Latch and Interrupt Priority Status. RD timing has the same timing as PSEN, DS, LDS,

UDS signals.

2. For inputs which use PPLD only.

3. This timing is only valid when read to the interrupt request latch and priority status latch are not valid.

*If ZPLD_TURBO is off and the ZPLD is operating above 15 MHz, there is no need to add 20 ns to the timing parameters.

Counter/Timer Timing (3.0 V ± 10%)

Interrupt Timing (3.0 V ± 10%)

AC/DC Parameters – ZPLD Timing Parameters

(ZPSD5XXV Versions)

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