74LVC1G86

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© NXP B.V. 2012. All rights reserved.

Product data sheet

Rev. 10 — 2 July 2012

4 of 19

NXP Semiconductors

74LVC1G86

2-input EXCLUSIVE-OR gate

6.2 Pin description

7.

Functional description

[1]

H = HIGH voltage level; L = LOW voltage level.

8.

Limiting values

[1]

The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2]

When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.

[3]

For TSSOP5 and SC-74A packages: above 87.5

C the value of P

tot derates linearly with 4.0 mW/K.

For XSON6 and X2SON5 packages: above 118

C the value of P

tot derates linearly with 7.8 mW/K.

Table 3.

Pin description

Symbol

Pin

Description

TSSOP5 and X2SON5

XSON6

B

1

1

data input

A

2

2

data input

GND

3

3

ground (0 V)

Y

4

4

data output

n.c.

-

5

not connected

VCC

5

6

supply voltage

Table 4.

Function table[1]

Input

Output

A

B

Y

LLL

LH

H

HL

H

HHL

Table 5.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol

Parameter

Conditions

Min

Max

Unit

VCC

supply voltage

0.5

+6.5

V

IIK

input clamping current

VI < 0 V

50

-

mA

VI

input voltage

[1]

0.5

+6.5

V

IOK

output clamping current

VO > VCC or VO < 0 V

-

50

mA

VO

output voltage

Active mode

[1][2]

0.5

VCC + 0.5

V

Power-down mode

[1][2]

0.5

+6.5

V

IO

output current

VO = 0 V to VCC

-

50

mA

ICC

supply current

-

+100

mA

IGND

ground current

100

-

mA

Ptot

total power dissipation

Tamb = 40 C to +125 C

[3] -

250

mW

Tstg

storage temperature

65

+150

C