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74HCS30D bảng dữ liệu(PDF) 8 Page - Nexperia B.V. All rights reserved |
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74HCS30D bảng dữ liệu(HTML) 8 Page - Nexperia B.V. All rights reserved |
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8 / 15 page ![]() Nexperia 74HCS30 8-input NAND gate with Schmitt-trigger inputs 25 °C -40 °C to +85 °C -40 °C to +125 °C Symbol Parameter Conditions Min Typ[1] Max Min Max Min Max Unit CPD power dissipation capacitance fi = 1 MHz; CL = 0 pF; VI = GND to VCC; VCC = 2.0 V to 6.0 V [4] - 10 - - - - - pF [1] Typical values are measured at nominal supply voltage. [2] tpd is the same as tPHL and tPLH. [3] tt is the same as tTHL and tTLH. [4] CPD is used to determine the dynamic power dissipation (PD in μW). PD = CPD × VCC 2 × fi + Σ(CL × VCC 2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; Σ(CL × VCC 2 × fo) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in V. 10.1. Waveforms and test circuit 001aal792 VOL VOH GND VM tPHL tPLH tTHL tTLH VM VX VY Y output A, B, C, D, E, F, G, H input VI Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 10. Propagation delay input (A, B, C, D, E, F, G, H) to output (Y) Table 8. Measurement points Input Output VM VM VX VY 0.5VCC 0.5VCC 10 % 90 % 74HCS30 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2025. All rights reserved Product data sheet Rev. 1 — 27 June 2025 8 / 15 |
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