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ADUCM320BBCZ bảng dữ liệu(PDF) 16 Page - Analog Devices

tên linh kiện ADUCM320BBCZ
Giải thích chi tiết về linh kiện  Precision Analog Microcontroller, 14-Bit Analog Input/Output with MDIO Interface, ARM Cortex-M3
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Data Sheet
ADuCM320
Rev. C | Page 15 of 30
TIMING SPECIFICATIONS
I2C Timing
Table 3. I2C Timing in Standard Mode (100 kHz)
Slave
Parameter
Description
Min
Typ
Max
Unit
tL
SCL low pulse width
4.7
µs
tH
SCL high pulse width
4.0
ns
tSHD
Start condition hold time
4.0
µs
tDSU
Data setup time
250
ns
tDHD
Data hold time (SDA held internally for 300 ns after falling edge of SCL)
0
3.45
µs
tRSU
Setup time for repeated start
4.7
µs
tPSU
Stop condition setup time
4.0
µs
tBUF
Bus-free time between a stop condition and a start condition
4.7
µs
tR
Rise time for both SLC and SDA
1
µs
tF
Fall time for both SLC and SDA
15
300
ns
tVD;DAT
Data valid time
3.45
µs
tVD;ACK
Data valid acknowledge time
3.45
µs
Table 4. I2C Timing in Fast Mode (400 kHz)
Slave
Parameter
Description
Min
Typ
Max
Unit
tL
SCL low pulse width
1.3
µs
tH
SCL high pulse width
0.6
ns
tSHD
Start condition hold time
0.3
µs
tDSU
Data setup time
100
ns
tDHD
Data hold time (SDA held internally for 300 ns after falling edge of SCL)
0
µs
tRSU
Setup time for repeated start
0.6
µs
tPSU
Stop condition setup time
0.3
µs
tBUF
Bus-free time between a stop condition and a start condition
1.3
µs
tR
Rise time for both SCL and SDA
20
300
ns
tF
Fall time for both SCL and SDA
15
300
ns
tVD;DAT
Data valid time
0.9
µs
tVD;ACK
Data valid acknowledge time
0.9
µs
Figure 2. I2C Compatible Interface Timing
SDA (I/O)
MSB
LSB
ACK
MSB
1
9
8
2–7
1
SCL (I)
P
S
START
CONDITION
REPEATED
START
STOP
CONDITION
S(R)
tDSU
tH
tL
tSHD
tPSU
tDSU
tBUF
tDHD
tVD; DAT
tVD; ACK
tR
tF
tF
tR
tDHD
tRSU



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