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XTP332 bảng dữ liệu(PDF) 15 Page - Renesas Technology Corp

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Giải thích chi tiết về linh kiện  XT Family of Ultra-low Phase Noise Quartz-based PLL Oscillators
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XTP332 bảng dữ liệu(HTML) 15 Page - Renesas Technology Corp

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©2021 Renesas Electronics Corporation
R31DS0007EU0100 April 8, 2021
XT Datasheet
HCSL Output Termination
Figure 9 is the recommended source termination for applications where the driver and receiver will be on a separate PCBs. This
termination is the standard for PCI Express™ and HCSL output types. All traces should be 50Ω impedance single-ended or 100Ω
differential. Figure 10 is the recommended termination for applications where a point-to-point connection can be used. A point-to-point
connection contains both the driver and the receiver on the same PCB. With a matched termination at the receiver, transmission-line
reflections will be minimized. In addition, a series resistor (Rs) at the driver offers flexibility and can help dampen unwanted reflections.
The optional resistor can range from 0Ω to 33Ω. All traces should be 50Ω impedance single-ended or 100Ω differential.
Figure 9. Recommended Source Termination (where the driver and receiver will be on separate PCBs)
Figure 10. Recommended Termination (where a point-to-point connection can be used)
CML Output Termination
Figure 11 shows an example of the termination for a CML driver. In this example, the transmission line characteristic impedance is 50Ω.
The R1 and R2 50Ω matched load terminations are pulled up to VDDO. The matched loads are located close to the receiver.
Figure 11. CML Driver Termination Example
0-0.2"
PCI Expres s
L1
L1
1-14"
Driver
Rs
0.5" Max
L3
L4
L2
L2
49.9 +/- 5%
22 to 33 +/-5%
Rt
L3
L4
L5
0.5 - 3.5"
L5
Connector
PCI Expres s
Add-in Card
PCI Expres s
0-0.2"
PCI Expres s
0-0.2"
0-18"
L1
L1
Rs
Driver
0.5" Max
L3
L3
L2
L2
49.9 +/- 5%
0 to 33
0 to 33
Rt
CML Driv er
Zo = 50
Zo = 50
R1
50
R2
50
VDDO
VDDO



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