EM78P341 datasheet(21/102 Pages) EMC

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EM78P341N/342N/343N

8-Bit Microprocessor with OTP ROM

Product Specification (V1.0) 12.01.2006

• 15

(This specification is subject to change without further notice)

6.1.10 RA (ADOC: ADC Offset Calibration Register)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

CALI

SIGN

VOF[2]

VOF[1]

VOF[0]

“0”

Bit 7 (CALI):

Calibration enable bit for ADC offset

0 = Calibration disable

1 = Calibration enable

Bit 6 (SIGN):

Polarity bit of offset voltage

0 = Negative voltage

1 = Positive voltage

Bit 5 ~ Bit 3 (VOF[2] ~ VOF[0]): Offset voltage bits

VOF[2]

VOF[1]

VOF[0]

EM78P342N/343N

ICE342N

0LSB

2LSB

4LSB

6LSB

8LSB

10LSB

12LSB

14LSB

Bit 2 ~ Bit 0:

Unimplemented, read as ‘0’

6.1.11 RB (ADDATA: Converted Value of ADC)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

AD11

AD10

AD9

AD8

AD7

AD6

AD5

AD4

When the AD conversion is completed, the result is loaded into the ADDATA. The

ADRUN bit is cleared, and the ADIF (see Section 6.1.14, RE (Interrupt Status 2 &

Wake-up Control Register)) is set.

RB is read only.

6.1.12 RC (ADDATA1H: Converted Value of ADC)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

“0”

AD11

AD10

AD9

AD8

When the AD conversion is completed, the result is loaded into the ADDATA1H. The

ADRUN bit is cleared, and the ADIF (see Section 6.1.14, RE (Interrupt Status 2 &

Wake-Up Control Register)) is set.

RC is read only

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