ICS524

LOW SKEW 1 TO 4 CLOCK BUFFER

FAN OUT BUFFER

IDT™ / ICS™ LOW SKEW 1 TO 4 CLOCK BUFFER

2

ICS524

REV C 021909

Pin Assignment

Pin Descriptions

External Components

A minimum number of external components are required for proper operation. A decoupling capacitor of 0.01 µF

should be connected between VDD on pin 5 and GND on pin 8, as close to the device as possible. A 33

Ω series

terminating resistor may be used on each clock output if the trace is longer than 1 inch.

To achieve the low output skew that the ICS524 is capable of, careful attention must be paid to board layout.

Essentially, all four outputs must have identical terminations, identical loads and identical trace geometries. If they

do not, the output skew will be degraded. For example, using a 30

Ω series termination on one output (with 33Ω on

the others) will cause at least 15 ps of skew.

1

2

3

VD D

4

Q0

Q1

Q3

GND

Q2

ICLK

8

7

6

5

NC

8-pi n SO IC

Pin

Number

Pin

Name

Pin

Type

Pin Description

1

ICLK

Input

Clock input, 5V tolerant input.

2

Q0

Output

Clock output 0.

3

Q1

Output

Clock output 1.

4

NC

—

Internal no connect.

5

VDD

Power

Connect to +2.5 V, +3.3 V or +5.0 V.

6

Q2

Output

Clock Output 2.

7

Q3

Output

Clock Output 3.

8

GND

Power

Connect to ground.