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TDA7418 bảng dữ liệu(PDF) 20 Page - STMicroelectronics

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I2C Bus specification
TDA7418
20/29
5
I2C Bus specification
5.1
Interface protocol
The interface protocol comprises:
–
a start condition (S)
–
a chip address byte (the LSB determines read/write transmission)
–
a subaddress byte
–
a sequence of data (N-bytes + acknowledge)
–
a stop condition (P)
–
the max. clock speed is 500kbits/s
5.1.1
Receive mode
S =
Start
R/W = "0" -> Receive Mode (Chip can be programmed by
μP)
"1" -> Transmission Mode (Data could be received by
μP)
ACK = Acknowledge
P =
Stop
TS = Testing mode
AZ = Auto zero remain
AI =
Auto increment
5.1.2
Transmission mode
SM = Soft mute activated for main channel
X = Not Used
The transmitted data is automatic updated after each ACK. Transmission can be repeated
without new chip address.
5.1.3
Reset condition
A Power-On-Reset is invoked if the Supply-Voltage is below than 2.5V. After that the
following data is written automatically into the registers of all subaddresses:
S
1
0
0
0
1
0
0
R/W
ACK
TS
AZ
AI
A4
A3
A2
A1
A0
ACK
DATA
ACK
P
S
1
0
0
0
1
0
0
R/W
ACK
X
X
XXXXX
SM
ACK
P
Table 5.
Registers of all subaddresses
MSB
LSB
11
111
11
0



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