cycling the device through the specified temperature range, and returning to 25°C. The fist thermal cycle is in

Figure 7-7 and second cycle is in Figure 7-8. Thermal hysteresis for REF53250CDR settles after first cycle.

Express hysteresis by Equation 2

VHYST= |VPRE−VPOST|

VNOM ×106 (ppm)

(2)

where

• VHYST = thermal hysteresis (in units of ppm)

• VNOM = the specified output voltage

• VPRE = output voltage measured at 25°C pre-temperature cycling

• VPOST = output voltage measured after the device cycles from 25°C through the specified temperature range

and returns to 25°C

Thermal Hysteresis (ppm)

0

10

20

30

40

50

0

20

40

60

80

100 120 140 160 180 200

Figure 7-7. Thermal Hysteresis Distribution - Cycle

1

Figure 7-8. Thermal Hysteresis Distribution - Cycle

2

7.5 Solder Heat Shift

The packaging materials of the REF53-Q1 have different coefficients of thermal expansion than the PCB

material. The different coefficients result in stress change on the device die when the part is heated during

soldering process and cooled down afterward. Thermal shock due to reflow and stress change on the device die

causes the output voltages to shift, degrading the initial accuracy performance of the product. Reflow soldering

is a common cause of this error. To quantify the impact, 32 devices are soldered on printed circuit boards using

lead-free solder paste and the paste manufacturer suggested reflow profile to show this effect. Figure 7-9 shows

the reflow profile. The printed circuit board is comprised of FR4 material. The board thickness is 1.65mm and the

area is 137mm × 168mm.

For recommended reflow profiles using 'Sn-Pb Eutectic Assembly' or 'Pb-Free Assembly' please refer JEDEC

J-STD-020 standard.

www.ti.com

REF53-Q1

SNVSCU8 – AUGUST 2026

Copyright © 2026 Texas Instruments Incorporated

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Product Folder Links: REF53-Q1