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L6228Q bảng dữ liệu(PDF) 20 Page - STMicroelectronics |
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L6228Q bảng dữ liệu(HTML) 20 Page - STMicroelectronics |
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20 / 32 page ![]() Circuit description L6228Q 20/32 Figure 21. Overcurrent protection simplified schematic Figure 22 shows the Overcurrent Detection operation. The Disable Time tDISABLE before recovering normal operation can be easily programmed by means of the accurate thresholds of the logic inputs. It is affected whether by CEN and REN values and its magnitude is reported in Figure 23. The Delay Time tDELAY before turning off the bridge when an overcurrent has been detected depends only by CEN value. Its magnitude is reported in Figure 24. CEN is also used for providing immunity to pin EN against fast transient noises. Therefore the value of CEN should be chosen as big as possible according to the maximum tolerable Delay Time and the REN value should be chosen according to the desired Disable Time. The resistor REN should be chosen in the range from 2.2 kΩ to 180 kΩ. Recommended values for REN and CEN are respectively 100 kΩ and 5.6 nF that allow obtaining 200 µs Disable Time. + OVER TEMPERATURE IREF (I1A+I2A) / n I1A / n POWER SENSE 1 cell POWER SENSE 1 cell POWER DMOS n cells POWER DMOS n cells HIGH SIDE DMOSs OF THE BRIDGE A OUT1A OUT2A VSA I1A I2A I2A / n FROM THE BRIDGE B OCD COMPARATOR OCD COMPARATOR TO GATE LOGIC INTERNAL OPEN-DRAIN RDS(ON) 40 Ω TYP. CEN. REN.EN VDD µC or LOGIC D01IN1337 |
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