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SBPH400-3 bảng dữ liệu(PDF) 12 Page - STMicroelectronics

tên linh kiện SBPH400-3
Giải thích chi tiết về linh kiện  IEEE1394 3-Port 400Mbps Physical Layer
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SBPH400-3 bảng dữ liệu(HTML) 12 Page - STMicroelectronics

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SBPH400-3
The fields in the Self-ID packet are derived as shown in Table 2.1.
2.7.3 Link_on packet
The SBPH400 will respond to a Link_on packet addressed to it received on the bus. The
packet has the following format:
Figure 2.3
Link_on packet format
If the logical AND of the LPS pin and the Link_active bit is zero, then the SBPH400 will
generate a 6.144 MHz signal on the LKON pin, until this logical value becomes 1. Otherwise
the packet is forwarded to the local link. Note that all Link_on packets received on the bus are
forwarded to the local link if it is active, whether or not the packets are addressed to the local
node.
2.7.4 PHY configuration packet
The SBPH400 will respond to every PHY configuration packet which it receives on the bus, or
from the link device for transmission on the bus. The packet has the format shown in Figure
2.4:
Table 2.1
Self ID packet fields
Field
Derived from
Comment
phy_ID
self-ID process or
set_PHY_ID packet
physical node identifier
L
Link enabled register
Logical AND of LPS signal and the Link_active register
gap_cnt
Gap_Count register
current value of Gap Count register
sp
Max_Phy_Speed
10b (S100, S200 and S400 capable)
rsv
(reserved)
00b
c
Contender register
current value of C register
pwr
Power class register
current value of Power class register
p0, p1 p2
port status for port 0, 1 and
2 respectively
01 - not active (disabled, disconnected or suspended)
10 - active and connected to parent node
11 - active and connected to child node
i
initiated reset
set whenever the node initiated the current bus reset
0 1
phy_ID
logical inverse of first quadlet
0000
0000
0000
0000
0000
0000
2



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