AD5544ARS datasheet(14/20 Pages) AD

14 / 20 page

AD5554/AD5554

Rev. A | Page 14 of 20

CIRCUIT OPERATION

The AD5544 and AD5554 contain four, 16-bit and 14-bit, cur-

rent-output, digital-to-analog converters, respectively. Each

DAC has its own independent multiplying reference input. Both

the AD5544 and the AD5554 use a 3-wire, SPI compatible, serial

data interface, with a configurable asynchronous RS pin for

half-scale (MSB = 1) or zero-scale (MSB = 0) preset. In addition,

an LDAC strobe enables four channel simultaneous updates for

hardware synchronized output voltage changes.

D/A CONVERTER

Each part contains four current-steering R-2R ladder DACs.

Figure 25 shows a typical equivalent DAC. Each DAC contains a

matching feedback resistor for use with an external I-to-V con-

verter amplifier. The RFBX pin connects to the output of the

external amplifier. The IOUTX terminal connects to the inverting

input of the external amplifier. The AGNDX pin should be Kelvin-

connected to the load point requiring full 16-bit accuracy. These

DACs are designed to operate with both negative or positive

reference voltage. The VDD power pin is only used by the logic to

drive the DAC switches on and off. Note that a matching switch

is used in series with the internal 5 kΩ feedback resistor. If users

attempt to measure the value of RFB, power must be applied to

VDD in order to achieve continuity. An additional VSS bias pin is

used to guard the substrate during high temperature applica-

tions, minimizing zero-scale leakage currents that double every

10°C. The DAC output voltage is determined by VREF and the

digital data (D) in the following equations:

(

)

5544

For

65536

REF

OUT

−

(1)

(

5554

For

1638

)

REF

OUT

−

(2)

Note that the output polarity is opposite to the VREF polarity for

dc reference voltages.

VREFX

VSS

DGND

VDD

RFBX

IOUTX

AGNDF

AGNDX

Ω

FROM OTHER DACS AGND

DIGITAL INTERFACE CONNECTIONS OMITTED FOR CLARITY.

SWITCHES S1 AND S2 ARE CLOSED, VDD MUST BE POWERED.

Figure 25. Typical Equivalent DAC Channel

These DACs are also designed to accommodate ac reference

input signals. Both the AD5544 and the AD5554 accommodate

input reference voltages in the range of −12 V to +12 V. The

reference voltage inputs exhibit a constant nominal input

resistance of 5 kΩ, ±30%. On the other hand, the DAC outputs

IOUTA, B, C, D are code-dependent and produce various out-

put resistances and capacitances. The choice of external ampli-

fier should take into account the variation in impedance

generated by the AD5544/AD5554 on the amplifiers’ inverting

input node. The feedback resistance, in parallel with the DAC

ladder resistance, dominates output voltage noise. For multi-

plying mode applications, an external feedback compensation

capacitor (CFB) may be needed to provide a critically damped

output response for step changes in reference input voltages.

Figure 26 and Figure 27 show the gain vs. frequency perfor-

mance at various attenuation settings using a 23 pF external

feedback capacitor connected across the IOUTX and RFBX ter-

minals for AD5544 and AD5554, respectively. In order to main-

tain good analog performance, power supply bypassing of

0.01 µF, in parallel with 1 µF, is recommended. Under these

conditions, a clean power supply with low ripple voltage capa-

bility should be used. Switching power supplies is usually not

suitable for this application due to the higher ripple voltage and

PSS frequency-dependent characteristics. It is best to derive the

AD5544/AD5554’s 5 V supply from the system’s analog supply

voltages. Do not use the digital 5 V supply (see Figure 28).

FREQUENCY (Hz)

FFFFH

10k

100k

10M

100

B15

B14

B13

B12

B11

B10

VDD = 5V

VREF = 100mV rms

TA = 25°C

Figure 26. AD5554 Reference Multiplying Bandwidth vs. Code

FREQUENCY (Hz)

3FFFH

10k

100k

10M

100

B13

B12

B11

B10

VDD = 5V

VREF = 100mV rms

TA = 25°C

CF = 23pF

Figure 27. AD5554 Reference Multiplying Bandwidth vs. Code

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