24FC08-ESLASHST datasheet(13/49 Pages) MICROCHIP

13 / 49 page

 2002-2021 Microchip Technology Inc.

DS20001710N-page 13

24AA08/24LC08B/24FC08

8.0

READ OPERATION

Read operations are initiated in the same way as write

operations, with the exception that the R/W bit of the

client address is set to ‘

1’. There are three basic types

of read operations: current address read, random read

and sequential read.

8.1

Current Address Read

The 24XX08 contains an Address Pointer that

maintains the address of the last word accessed,

internally incremented by one. Therefore, if the

previous access (either a read or write operation) was

to address n, the next current address read operation

would access data from address n+ 1. Upon receipt

of the client address with R/W bit set to ‘

1’, the 24XX08

issues an Acknowledge and transmits the 8-bit data

word. The host will not acknowledge the transfer, but

does generate a Stop condition and the 24XX08

discontinues transmission (Figure 8-1).

8.2

Random Read

Random read operations allow the host to access any

memory location in a random manner. To perform this

type of read operation, the word address must first be

set. This is accomplished by sending the word address

to the 24XX08 as part of a write operation. Once the

word address is sent, the host generates a Start

condition following the Acknowledge. This terminates

the write operation, but not before the internal Address

Pointer is set. The host then issues the control byte

again, but with the R/W bit set to a ‘

1’. The 24XX08 will

then issue an Acknowledge and transmits the 8-bit data

word. The host will not acknowledge the transfer, but

does generate a Stop condition and the 24XX08

discontinues transmission (Figure 8-2).

8.3

Sequential Read

Sequential reads are initiated in the same way as a

random read or current read, except that once the

24XX08 transmits the first data byte, the host issues an

Acknowledge (as opposed to a Stop condition in a

random read). This directs the 24XX08 to transmit the

next sequentially addressed 8-bit word (Figure 8-3).

To provide sequential reads the 24XX08 contains an

internal Address Pointer which is incremented by one

at the completion of each operation. This Address

Pointer allows the entire memory contents to be serially

read during one operation.

8.4

Noise Protection

The SCL and SDA inputs have Schmitt Trigger and

filter circuits which suppress noise spikes to assure

proper device operation even on a noisy bus.

FIGURE 8-1:

CURRENT ADDRESS READ

Bus Activity

Host

SDA Line

Bus Activity

Control

Byte

Data (n)

Block

Select

Bits

x = “don’t care”

101 0 x B1 B0 1

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