R31DS0036EU0300 MAY 20, 2021

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©2021 Renesas Electronics Corporation

8SLVP1212 Datasheet

Table 1. Pin Descriptions

NOTE: Pulldown and Pullup refers to an internal input resistors. See Table 2, Pin Characteristics, for typical values.

Table 2. Pin Characteristics

Function Table

Table 3. SEL Input Section Function Table

NOTE: SEL is an asynchronous control.

Number

Name

Type

Description

1

SEL

Input

Pulldown

Reference select control. See Table 3A for function.

LVCMOS/LVTTL interface levels.

2

PCLK1

Input

Pulldown

Non-inverting LVPECL differential clock/data input.

3

nPCLK1

Input

Pulldown/Pullup

Inverting LVPECL differential clock/data input.

4, 10

nc

Unused

Do not connect.

5, 6, 11, 20,

31, 40

VCC

Power

Power supply pins.

7

VREF

Output

Bias voltage reference.

8

nPCLK0

Input

Pulldown/Pullup

Inverting LVPECL differential clock/data input.

9

PCLK0

Input

Pulldown

Non-inverting LVPECL differential clock/data input.

12, 13

Q0, nQ0

Output

Differential output pair 0. LVPECL interface levels.

14, 15

Q1, nQ1

Output

Differential output pair 1. LVPECL interface levels.

16, 17

Q2, nQ2

Output

Differential output pair 2. LVPECL interface levels.

18, 19

Q3, nQ3

Output

Differential output pair 3. LVPECL interface levels.

21, 30

VEE

Power

Negative power supply pins.

22, 23

Q4, nQ4

Output

Differential output pair 4. LVPECL interface levels.

24, 25

Q5, nQ5

Output

Differential output pair 5. LVPECL interface levels.

26, 27

Q6, nQ6

Output

Differential output pair 6. LVPECL interface levels.

28, 29

Q7, nQ7

Output

Differential output pair 7. LVPECL interface levels.

32, 33

Q8, nQ8

Output

Differential output pair 8. LVPECL interface levels.

34, 35

Q9, nQ9

Output

Differential output pair 9. LVPECL interface levels.

36, 37

Q10, nQ10

Output

Differential output pair 10. LVPECL interface levels.

38, 39

Q11, nQ11

Output

Differential output pair 11. LVPECL interface levels.

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

CIN

Input Capacitance

2

pF

RPULLDOWN

Input Pulldown Resistor

51

k

RPULLUP

Input Pullup Resistor

51

k

Input

Operation

SEL

0 (default)

PCLK0, nPCLK0 is the selected differential clock input

1

PCLK1, nPCLK1 is the selected differential clock input