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M95256 bảng dữ liệu(PDF) 16 Page - STMicroelectronics

tên linh kiện M95256
Giải thích chi tiết về linh kiện  256 Kbit Serial SPI bus EEPROM with high speed clock
PDF  39 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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M95256 bảng dữ liệu(HTML) 16 Page - STMicroelectronics

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(BP1, BP0) bits of the Status Register, are
also hardware protected against data
modification.
Regardless of the order of the two events, the
Hardware Protected Mode (HPM) can be entered:
–
by setting the Status Register Write Disable
(SRWD) bit after driving Write Protect (W) Low
–
or by driving Write Protect (W) Low after
setting the Status Register Write Disable
(SRWD) bit.
The only way to exit the Hardware Protected Mode
(HPM) once entered is to pull Write Protect (W)
High.
If Write Protect (W) is permanently tied High, the
Hardware Protected Mode (HPM) can never be
activated, and only the Software Protected Mode
(SPM), using the Block Protect (BP1, BP0) bits of
the Status Register, can be used.
Figure 11. Write Status Register (WRSR) Sequence
C
D
AI02282D
S
Q
2
1
3456789 10 11 12 13 14 15
High Impedance
Instruction
Status
Register In
0
765432
0
1
MSB



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