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R7KA8D2ADDCAC bảng dữ liệu(PDF) 62 Page - Renesas Technology Corp |
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R7KA8D2ADDCAC bảng dữ liệu(HTML) 62 Page - Renesas Technology Corp |
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62 / 292 page ![]() Table 2.11 Current of high-speed mode, maximum condition (MVE and peripheral operation), CPU0 active, CPU1 Deep Sleep (External VDD mode) Parameter Symbol Typ Max Unit Test conditions 95 °C 105 °C Supply current*1 *2*4 — ICC 3.85 6.27 6.69 mA — CPUCLK 0 = 1 GHz CPUCLK 1 = 250 MHz VCL = voltage range 1 IDD *3 447 889 — mA MRICLK = 250 MHz, MRPCLK = 125 MHz, ICLK = 250 MHz, BCLK = 125 MHz, PCLKA = 125 MHz, PCLKB = 62.5 MHz, PCLKC = 125 MHz, PCLKD = 250MHz, PCLKE = 250 MHz CPU1 = Deep Sleep CPUCLK 0 = 800 MHz CPUCLK 1 = 200 MHz VCL = voltage range 1 IDD *3 376 — 933 mA MRICLK = 200 MHz, MRPCLK = 100 MHz, ICLK = 200 MHz, BCLK = 100 MHz, PCLKA = 100 MHz, PCLKB = 50 MHz, PCLKC = 100 MHz, PCLKD = 200 MHz, PCLKE = 200 MHz CPU1 = Deep Sleep CPUCLK 0 = 600 MHz CPUCLK 1 = 150 MHz VCL = voltage range 2 IDD *3 300 750 823 mA MRICLK = 150 MHz, MRPCLK = 75 MHz, ICLK = 150 MHz, BCLK = 75 MHz, PCLKA = 75 MHz, PCLKB = 37.5 MHz, PCLKC = 75 MHz, PCLKD = 150 MHz, PCLKE = 150 MHz CPU1 = Deep Sleep Note 1. Supply current values are with all output pins unloaded and all input pull-up MOSs in the off state. Note 2. Measured with clocks supplied to the peripheral functions and peripherals being operated. This does not include the BGO operation. Note 3. IDD depends on f (CPUCLK0 and ICLK) as follows. IDD Typ. = 0.25 × fCPUCLK0 + 0.74 × fICLK + 21 (unit : mA, fCPUCLK0 and fICLK are MHz) IDD Max.(VCL = voltage range 1, 95℃) = 0.22 × fCPUCLK0 + 0.96 × fICLK + 487 (unit : mA, fCPUCLK0 and fICLK are MHz) IDD Max.(VCL = voltage range 1, 105℃) = 0.22 × fCPUCLK0 + 0.96 × fICLK + 565 (unit : mA, fCPUCLK0 and fICLK are MHz) IDD Max.(VCL = voltage range 2, 95℃) = 0.22 × fCPUCLK0 + 0.97 × fICLK + 474 (unit : mA, fCPUCLK0 and fICLK are MHz) IDD Max.(VCL = voltage range 2, 105℃) = 0.22 × fCPUCLK0 + 0.97 × fICLK + 549 (unit : mA, fCPUCLK0 and fICLK are MHz) Note 4. The power consumption is calculated as Power = VCC × Icc + VCL x IDD. Table 2.12 Current of high-speed mode, maximum data processing (MVE operation), peripheral clock ON (DCDC mode) Parameter Symbol Typ Max Unit Test conditions 95 °C 105 °C Supply current *1*2 CPUCLK0 = 1 GHz CPUCLK1 = 250 MHz VSCR_1 ICC_DCDC*4 142 331 — mA VCC_DCDC = 3.3 V*5 IDD*3 363 850 — CPUCLK0 = 800 MHz CPUCLK1 = 200 MHz VSCR_1 ICC_DCDC*4 117 — 349 IDD*3 301 — 897 CPUCLK0 = 600 MHz CPUCLK1 = 150 MHz VSCR_2 ICC_DCDC*4 89 271 313 IDD*3 234 709 819 RA8D2 Datasheet 2. Electrical Characteristics R01DS0493EJ0130 Rev.1.30 Feb 27, 2026 Page 62 of 292 |
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