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R7KA8M2AFDCAM bảng dữ liệu(PDF) 267 Page - Renesas Technology Corp |
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R7KA8M2AFDCAM bảng dữ liệu(HTML) 267 Page - Renesas Technology Corp |
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267 / 295 page ![]() tPCFG (Typ) = 6.146/FMRPCLK + 0.3133 [msec], tPCFG (Max) = 266.5/FMRPCLK + 6.331 [msec] for normal program mode. tPCFG (Typ) = 5.184/FMRPCLK + 0.02754 [msec], tPCFG (Max) = 267.5/FMRPCLK + 6.025 [msec] for high speed program mode. Note 6. Read and program operations for the extra MRAM cannot be executed simultaneously. This value is for independent program operation without arbitration between read and program. Note 7. The update cycle is the number of a configuration set command that can be issued configuration area. Programming the same data to the same address also increases the update cycle count by one. 2.15.3 Option Setting Memory (OTP area with ECC) Characteristics Table 2.118 Option setting memory (OTP area with ECC) characteristics Parameter MRPCLK = 125 MHz MRPCLK = 100 MHz MRPCLK = 75 MHz MRPCLK = 66 MHz Min Typ *1 Max Min Typ *1 Max Min Typ *1 Max Min Typ *1 Max Programming time of 16- byte*3 *4 Normal speed write mode (MWMCR. MWM[1:0] = 00) tOTP E — 8.05 *2 113 — 8.05 *2 113 — 8.05 *2 113 — 8.05 *2 113 ms — High speed write mode 0 (MWMCR. MWM[1:0] = 01) — 4.03 *2 56.7 — 4.03 *2 56.7 — 4.03 *2 56.7 — 4.03 *2 56.7 ms — High speed write mode 1 (MWMCR. MWM[1:0] = 10) — 0.22 9*2 3.14 — 0.22 9*2 3.14 — 0.22 9*2 3.14 — 0.22 9*2 3.14 ms — Note 1. The reference value at VCC = 3.3 V and room temperature. Note 2. Perform rewrite 50% of bits at Typ. condition. Note 3. To calculate the updating time at other frequencies, using approximate formula below listed. (FMRPCLK: frequency of MRPCLK [MHz]) tOTPE (Typ) = 0.5065/FMRPCLK + 8.123 [ms], tOTPE (Max) = 4.433/FMRPCLK + 114.1 [ms] for normal speed mode. tOTPE (Typ) = 0.3389/FMRPCLK + 4.067 [ms], tOTPE (Max) = 2.428/FMRPCLK + 57.08 [ms] for high speed mode 0. tOTPE (Typ) = 0.1458/FMRPCLK + 0.2312 [ms], tOTPE (Max) = 0.3904/FMRPCLK + 3.166 [ms] for high speed mode 1. Note 4. Read and program operations for the extra MRAM cannot be executed simultaneously. This value is for independent program operation without arbitration between read and program. RA8M2 Datasheet 2. Electrical Characteristics R01DS0438EJ0130 Rev.1.30 Feb 27, 2026 Page 267 of 295 |
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