R7KA8M2ADECAC datasheet(14/295 Pages) RENESAS

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Table 1.15

Pin functions (2 of 7)

Function

Signal

I/O

Description

Interrupt

NMI

Input

Non-maskable interrupt request pin

IRQn

Input

Maskable interrupt request pins

IRQn-DS

Input

Maskable interrupt request pins that can also be used in Deep Software Standby

mode

External bus

interface

EBCLK

Output Outputs the external bus clock for external devices

Output Strobe signal indicating that reading from the external bus interface space is in

progress, active-low

Output Strobe signal indicating that writing to the external bus interface space is in

progress, in 1-write strobe mode, active-low

WRn

Output Strobe signals indicating that either group of data bus pins (D07 to D00, D15 to

D08, D23 to D16 or D31 to D24) is valid in writing to the external bus interface

space, in byte strobe mode, active-low

BCn

Output Strobe signals indicating that either group of data bus pins (D07 to D00, D15 to

D08, D23 to D16 or D31 to D24) is valid in access to the external bus interface

space, in 1-write strobe mode, active-low

ALE

Output Address latch signal when address/data multiplexed bus is selected

WAIT

Input

Input pin for wait request signals in access to the external space, active-low

CSn

Output Select signals for CS areas, active-low

A00 to A23

Output Address bus

D00 to D31

I/O

Data bus

A00/D00 to A15/D15

I/O

Address/data multiplexed bus

SDRAM interface

SDCLK

Output Outputs the SDRAM-dedicated clock

CKE

Output SDRAM clock enable signal

SDCS

Output SDRAM chip select signal, active low

RAS

Output SDRAM low address strobe signal, active low

CAS

Output SDRAM column address strobe signal, active low

Output SDRAM write enable signal, active low

DQMn

Output SDRAM I/O data mask enable signal for DQ07 to DQ00, DQ15 to DQ08, DQ23 to

DQ16 or DQ31 to DQ24

A00 to A16

Output Address bus

DQ00 to DQ31

I/O

Data bus

RA8M2 Datasheet

1. Overview

R01DS0438EJ0130 Rev.1.30

Feb 27, 2026

Page 14 of 295

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