CHR71000 datasheet(40/54 Pages) AMSOSRAM

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CHR71000

Functional description

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DS000427 • v2-01 • 2026-Mar-18

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7.6.3

Output gain and offset

The gain of the on-chip output amplifier is selectable through the SPI resister settings. The

gain varies linearly between 1 and 3.5 in 16 steps (4 bits). Up to gain setting 8, the gain

increases by approximately 10-12 % for successive settings. From setting 9 onwards, the gain

increases by about 20-22 % for successive settings. Figure 22 shows the gain values for the

different gain register settings.

Besides the gain, also the offset level of each channel can be programmed. This allows

balancing the random offsets of the different internal channels. Internally, the CHR71000 uses

16 analog channels (multiplexed to 8 outputs). That is why 16 offset registers are

programmable over SPI (registers 64 – 87). The output buffer has been designed to nominally

drive a 20 pF capacitive load at nominal 30 Mpixels/s readout rate (per output). The polarity of

the output signal is positive video (dark pixel signals low, bright pixel signals high).

So, the analog output swing depends on the gain and offset settings. You can see the different

levels and swing in Figure 23.

Figure 22: PGA setting vs. actual PGA gain

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