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AS89010 bảng dữ liệu(PDF) 20 Page - ams-OSRAM AG

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Giải thích chi tiết về linh kiện  16 bit 4-channel analog-to-digital converter (ADC) with I2C control/output
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AS89010 bảng dữ liệu(HTML) 20 Page - ams-OSRAM AG

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db12348e_V3.11_preliminary_2017-07-06
Page 18 of 41
AS89010
V3.11
5.6.3 I²C Addressable Register Space
Table 6 shows the overview of the internal register which can be accessed via I²C interface. The control
register bank can be accessed in the configuration state and these registers are all 8 bit long.
The output registers can only be accessed for read in the measurement state. They are 16 bit long, except
OUTINT which is 24 bit long. The device transfers the output data registers with the lowest byte first. The
output registers data transfer can start at any address. If the transfer starts not at address (hex) 00h and
during the sequential data read the highest possible address is arrived (ENTM=1: Address 04 with 3 byte;
ENTM=0: Address 03 with 2 byte), the internal pointer resets back to the address 00h so that next data
byte transferred corresponds to the low byte of OUT0. In this manner transfer continues with the first
register (OUT0). However, the maximum of number of output data transferred must not exceed a total
number of bytes accessible at all (8 bytes if integration time measurement is not activated otherwise
11 bytes). The OUTINT is only valid if CREGH:ENTM bit has been set.
Table 6: Register access overview
ADDRESS
[hex]
ACCESS IN CONFIGURATION STATE
ACCESS IN MEASUREMENT STATE
Write
Read
Write
Read
00
OSR
–
OSR
OUT0
01
–
–
OUT1
02
–
AGEN
–
OUT2
03
–
–
OUT3
04
–
–
OUTINT
05
–
–
–
06
CREGL
–
–
07
CREGH
–
–
08
OPTREG
–
–
09
BREAK
–
–
0A
EDGES
–
–
5.6.4 Examples of using I²C-interface
An example of usual I²C communication set of sequences is shown in Figure 13. After a Power-up, the
device is in a default configuration state. User can now set up the device for the application by writing
control register. Success of the configuration can be proven by reading the control register.
Before a measurement can be started, the device must change its state into the measurement mode. In
the last three bits of OSR ‘011b’ should be loaded. Now a conversion can be started, it will start accordingly
to the measurement mode selected by CREGH:MODE. When a conversion ends, rising edge of READY
signalizes this (not in SYND Mode), the conversion data can be read.
If a new configuration should be implemented, the device has to change its state back to configuration
mode, by loading ‘010b’ into the last three bits of OSR. At this action all control registers will reset to their
default values. New configuration can be made now.



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