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DIU6931 bảng dữ liệu(PDF) 10 Page - DIOO MICROCIRCUITS CO., LTD |
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DIU6931 bảng dữ liệu(HTML) 10 Page - DIOO MICROCIRCUITS CO., LTD |
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10 / 12 page ![]() DIU6931 www.dioo.com © 2024 DIOO MICROCIRCUITS CO., LTD DIU6931• V1.1 ISAT,MIN>IOUT,MAX + L f 2 ) /V V (1 V SW MAX IN, OUT OUT (4) 3) The DCR of the inductor and the core loss at the switching frequency must be low enough to achieve the desired efficiency requirement. It is desirable to choose an inductor with DCR < 50 mΩ to achieve a good overall efficiency. Layout Design The layout design of DIU6931 regulator is relatively simple. For the best efficiency and minimum noise problems, we should place the following components close to the IC: CIN, L1, R1 and R2. 1) It is desirable to maximize the PCB copper area connected to GND pin to achieve the best thermal and noise performance. If the board space allowed, a ground plane is highly desirable. 2) CIN must be close to pins IN and GND. The loop area formed by CIN and GND must be minimized. 3) The PCB copper area associated with SW pin must be minimized to avoid the potential noise problem. 4) The components R1 and R2, and the trace connected to the FB pin must NOT be adjacent to the SW net on the PCB layout to avoid the noise problem. 5) If the system chip interfacing with the EN pin has a high impedance state at shutdown mode and the IN pin is connected directly to a power source such as a Li-Ion battery, it is desirable to add a pull down 1 MΩ resistor between the EN and GND pins to prevent the noise from falsely turning on the regulator at shutdown mode. |
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