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AS1109

Datasheet - Application In form atio n

9.5 Package Power Dissipation

The maximum allowable package power dissipation (PD) is determined as:

PD(MAX) = (TJ-TAMB)/RTH(J-A)

(EQ 4)

When 8 output channels are turned on simultaneously, the actual package power dissipation is:

PD(ACT) = (IDD*VDD) + (IOUT*Duty*VDS*8)

(EQ 5)

Therefore, to keep PD(ACT)

≤ PD(MAX), the allowable maximum output current as a function of duty cycle is:

IOUT = {[(TJ-TAMB)/RTH(J-A)]-(IDD*VDD)}/VDS/Duty/8

(EQ 6)

Where:

TJ = 150ºC

9.6 Delayed Outputs

The AS1109 has graduated delay circuits between outputs. These delay circuits can be found between OUTNn and constant current block.

The fixed delay time is 20 ns (typ) where OUTN0 has no delay, OUTN1 has 20ns delay, OUTN2 has 40ns delay ... OUTN7 has 140ns delay. This

delay prevents large inrush currents, which reduce power supply bypass capacitor requirements when the outputs turn on (see Figure 12 on

page 9)

9.7 Switching-Noise Reduction

LED drivers are frequently used in switch-mode applications which normally exhibit switching noise due to parasitic inductance on the PCB.

9.8 Load Supply Voltage

Considering the package power dissipation limits (see EQ 4:6), the AS1109 should be operated within the range of

VDS = 0.4 to 1.0V.

For example, if VLED is higher than 5V, VDS may be so high that PD(ACT) > PD(MAX) where VDS = VLED - VF. In this case, the lowest possible

supply voltage or a voltage reducer (VDROP) should be used. The voltage reducer allows

VDS = (VLED -VF) - VDROP.

Note:

Resistors or zener diodes can be used as a voltage reducer as shown in Figure 24.

Figure 24. Voltage Reducer using Resistor (Left) and Zener Diode (Right)

AS1109

VDS

VF

Voltage Supply

}

VLED

VDROP

AS1109

VDS

VF

VLED

VDROP

Voltage Supply

{