RA2E2 datasheet(24/101 Pages) RENESAS

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Table 2.15

Thermal resistance

Parameter

Package

Symbol

Value*1

Unit

Test conditions

Thermal Resistance

20-pin HWQFN

θja

25.7

℃/W

JESD 51-2 and 51-7

compliant

24-pin HWQFN

24.7

16-pin WLCSP

T.B.D

JESD 51-2 and 51-9

compliant

20-pin HWQFN

Ψjt

0.31

℃/W

JESD 51-2 and 51-7

compliant

24-pin HWQFN

0.30

16-pin WLCSP

T.B.D

JESD 51-2 and 51-9

compliant

Note 1. The values are reference values when the 4-layer board is used. Thermal resistance depends on the number of layers or size of the

board. For details, see the JEDEC standards.

2.3

AC Characteristics

2.3.1

Frequency

Table 2.16

Operation frequency in high-speed operating mode

Conditions: VCC = AVCC0 = 1.8 to 5.5 V

Parameter

Symbol

Min

Typ

Max*4

Unit

Operation

frequency

System clock (ICLK)*1*2

1.8 to 5.5 V

0.032768 —

MHz

Peripheral module clock (PCLKB)

1.8 to 5.5 V

—

Peripheral module clock (PCLKD)*3

1.8 to 5.5 V

—

Note 1. The lower-limit frequency of ICLK is 1 MHz while programming or erasing the flash memory. When using ICLK for programming or

erasing the flash memory at below 4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as

1.5 MHz cannot be set.

Note 2. The frequency accuracy of ICLK must be ± 1.0% during programming or erasing the flash memory. Confirm the frequency accuracy

of the clock source.

Note 3. The lower-limit frequency of PCLKD is 1 MHz when the ADC12 is in use.

Note 4. The maximum value of operation frequency does not include internal oscillator errors. For details on the range for guaranteed

operation, see Table 2.20.

Table 2.17

Operation frequency in middle-speed mode

Conditions: VCC = AVCC0 = 1.6 to 5.5 V

Parameter

Symbol

Min

Typ

Max*4

Unit

Operation

frequency

System clock (ICLK)*1*2

1.8 to 5.5 V

0.032768 —

MHz

1.6 to 1.8 V

0.032768 —

Peripheral module clock (PCLKB)

1.8 to 5.5 V

—

1.6 to 1.8 V

—

Peripheral module clock (PCLKD)*3

1.8 to 5.5 V

—

1.6 to 1.8 V

—

Note 1. The lower-limit frequency of ICLK is 1 MHz while programming or erasing the flash memory. When using ICLK for programming or

erasing the flash memory at below 4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as

1.5 MHz cannot be set.

Note 2. The frequency accuracy of ICLK must be ± 1.0% while programming or erasing the flash memory. Confirm the frequency accuracy

of the clock source.

Note 3. The lower-limit frequency of PCLKD is 1 MHz when the ADC12 is in use.

Note 4. The maximum value of operation frequency does not include internal oscillator errors. For details on the range for guaranteed

operation, see Table 2.20.

RA2E2 Datasheet

2. Electrical Characteristics

R01DS0387EJ0150 Rev.1.50

Nov 8, 2025

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