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UPC4094 bảng dữ liệu(PDF) 3 Page - Renesas Technology Corp

tên linh kiện UPC4094
Giải thích chi tiết về linh kiện  High Slew Rate, Low Offset Voltage J-FET Input Dual Operational Amplifier
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nhà sản xuất  RENESAS [Renesas Technology Corp]
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UPC4094 bảng dữ liệu(HTML) 3 Page - Renesas Technology Corp

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UPC814, UPC4094
R03DS0129EJ0100 Rev.1.00
Page 3 of 7
Feb.25.25
ELECTRICAL CHARACTERISTICS (TA = 25 °C, V ± = ±15 V)
Parameter
Symbol
MIN.
TYP.
MAX.
Unit
Test Condition
Input Offset Voltage
VIO
±1
±3
mV
RS ≤ 50 Ω
Input Offset Current Note7
IIO
±25
±100
pA
Input Bias Current Note7
IB
50
200
pA
Large Signal Voltage Gain
AV
25000
200000
RL ≥ 2 kΩ, VO = ±10 V
Circuit Current Note8
ICC
5
6.8
mA
IO = 0 A
Common Mode Rejection Ratio
CMR
70
100
dB
Supply Voltage Rejection Ratio
SVR
70
100
dB
Output Voltage Swing
Vom
±12
+14.0
-13.3
V
RL ≥ 10 kΩ
Output Voltage Swing
Vom
±10
+13.5
-12.8
V
RL ≥ 2 kΩ
Common Model Input Voltage
Range
VICM
±11
+14
-12
V
Slew Rate
SR
25
V/μs
AV = 1
Unity Gain Frequency
funity
6
MHz
Channel Separation
120
dB
Input Equivalent Noise Voltage
Density
en
19
nV/ Hz
RS = 100 Ω, f = 1 kHz
Input Offset Voltage
VIO
±5
mV
RS ≤ 50 Ω, TA = -20 ~ +70 °C
Average VIO Temperature Drift
Δ
VIO/ΔT
±7
μV/°C
TA = -20 ~ +70 °C
Input Offset Current Note7
IIO
±2
nA
TA = -20 ~ +70 °C
Input Bias Current Note7
IB
7
nA
TA = -20 ~ +70 °C
【
Note】 7. The direction of the input bias current is the same direction that flows into the IC because the first stage is
composed of Pch J-FET. When TJ = 25°C or higher, it increases exponentially with increase in temperature
(please see IB - TA characteristics). During measurement, please kindly take care of TJ ≒ TA.
8. It is the current that flows into the internal circuit. This current flows irrespective of the channel usage.
Caution
Since UPC814 and UPC4094 have high input impedance characteristics, please be careful of insulation between the
terminals on the board.



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