M58CR032C datasheet(51/63 Pages) STMICROELECTRONICS

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M58CR032C, M58CR032D

Table 34. Burst Read Information

(P+9)h = 42h

0001h

Supported Functions after Suspend

Read Array, Read Status Register and CFI Query

bit 0

Program supported after Erase Suspend (1 = Yes, 0 = No)

bit 7 to 1

Reserved; undefined bits are ‘0’

Yes

(P+A)h = 43h

0003h

Block Protect Status

Defines which bits in the Block Status Register section of the Query are

implemented.

bit 0

Block protect Status Register Lock/Unlock

bit active

(1 = Yes, 0 = No)

bit 1

Block Lock Status Register Lock-Down bit active (1 = Yes, 0 = No)

bit 15 to 2

Reserved for future use; undefined bits are ‘0’

Yes

(P+B)h

0000h

(P+C)h = 45h

0018h

VDD Logic Supply Optimum Program/Erase voltage (highest performance)

bit 7 to 4

HEX value in volts

bit 3 to 0

BCD value in 100 mV

1.8V

(P+D)h = 46h

00C0h

VPP Supply Optimum Program/Erase voltage

bit 7 to 4

HEX value in volts

bit 3 to 0

BCD value in 100 mV

12V

(P+E)h = 47h

(P+F)h

(P+10)h

(P+11)h

(P+12)h

0000h

Reserved

Offset

Data

Description

Value

(P+13)h = 4Ch

0003h

Page-mode read capability

bits 0-7

’n’ such that 2n HEX value represents the number of read-

page Bytes. See offset 28h for device word width to

determine page-mode data output width.

8 Byte

(P+14)h = 4Dh

0003h

Number of synchronous mode read configuration fields that follow.

(P+15)h = 4Eh

0001h

Synchronous mode read capability configuration 1

bit 3-7

Reserved

bit 0-2

’n’ such that 2n+1 HEX value represents the maximum

number of continuous synchronous reads when the device is

configured for its maximum word width. A value of 07h

indicates that the device is capable of continuous linear

bursts that will output data until the internal burst counter

reaches the end of the device’s burstable address space.

This field’s 3-bit value can be written directly to the read

configuration register bit 0-2 if the device is configured for its

maximum word width. See offset 28h for word width to

determine the burst data output width.

(P+16)h = 4Fh

0002h

Synchronous mode read capability configuration 2

(P+17)h = 50h

0007h

Synchronous mode read capability configuration 3

Cont.

(P+18)h = 51h

0036h

Max operating clock frequency (MHz)

54 MHz

Offset

Data

Description

Value

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