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Page 18
on-chip VREF_BUFFER (a relatively stable standard voltage of 1.2V). ADC
supports differential input mode in addition to single-ended mode, but channel
AIN8 only supports single-ended input mode.
The analog watchdog function allows one channel, multiple channels or all
selected channels to be monitored very accurately. When the monitored signal
exceeds the preset threshold, an interrupt will be generated.
Events generated by the advanced control timer (TMR1) can cascade trigger
ADC respectively, and applications can synchronize AD conversion with clock.
Table 10 ADC product features
Product features
description
Input voltage value
0 to VDD
Conversion mode
Single, continuous and buffered continuous conversion mode
Buffer
Size (10x12 bits)
Conversion channel
9, which can be converted once or continuously
Differential input
Four pairs
Analog watchdog
Programmable upper and lower limits of analog watchdog
Analog watchdog
interrupt
Convenient handling of analog watchdog events
External trigger input
It can be triggered by a rising edge event on the ADC_ETR pin
Triggered from TMR1
TRGO
Yes
End of conversion
interrupt
Settable
Timer
The product includes two advanced control timers (TMR1 and TMR1A), one
general timer (TMR2), one basic timer (TMR4), two watchdog timers, one
system tick timer and one automatic wake-up timer.
4.11.1.
Advanced control timer (TMR1 and TMR1A)
Advanced timer functions are shown in the following table:
Table 11 Advanced control timer
Timer type
Advanced control timer
Timer
TMR1
TMR1A



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