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ST7LITE1XB bảng dữ liệu(PDF) 138 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
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ST7LITE1XB bảng dữ liệu(HTML) 138 Page - STMicroelectronics

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13.11 10-BIT ADC CHARACTERISTICS
Subject to general operating condition for VDD, fOSC, and TA unless otherwise specified.
Figure 110. Typical Application with ADC
Notes:
1. Unless otherwise specified, typical data are based on TA=25°C and VDD-VSS=5V. They are given only as design guide-
lines and are not tested.
2. When VDDA and VSSA pins are not available on the pinout, the ADC refers to VDD and VSS.
3. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than 10k
Ω). Data
based on characterization results, not tested in production.
4. The stabilization time of the AD converter is masked by the first tLOAD. The first conversion after the enable is then
always valid.
Related application notes:
Understanding and minimizing ADC conversion errors (AN1636)
Software techniques for compensating ST7 ADC errors (AN1711)
Symbol
Parameter
Conditions
Min
Typ 1)
Max
Unit
fADC
ADC clock frequency
4
MHz
VAIN
Conversion voltage range 2)
VSSA
VDDA
V
RAIN
External input resistor
10 3)
k
Ω
CADC
Internal sample and hold capacitor
6
pF
tSTAB
Stabilization time after ADC enable
fCPU=8MHz, fADC=4MHz
0 4)
µs
tADC
Conversion time (Sample+Hold)
3.5
- Sample capacitor loading time
- Hold conversion time
4
10
1/fADC
IADC
Analog Part
1
mA
Digital Part
0.2
AINx
ST72XXX
VDD
IL
±1
µA
VT
0.6V
VT
0.6V
CADC
6pF
VAIN
RAIN
10-Bit A/D
Conversion



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