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CS5460 bảng dữ liệu(PDF) 10 Page - Cirrus Logic

tên linh kiện CS5460
Giải thích chi tiết về linh kiện  Single Phase Bi-Directional Power/Energy IC
PDF  34 Pages
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nhà sản xuất  CIRRUS [Cirrus Logic]
Trang chủ  http://www.cirrus.com
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CS5460 bảng dữ liệu(HTML) 10 Page - Cirrus Logic

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CS5460
10
DS279PP5
2.2 Performing Measurements
The CS5460 performs measurements of instanta-
neous current, instantaneous voltage, instantaneous
power, energy, RMS current, and RMS voltage.
These measurements are output as 24-bit signed
and unsigned data formats as a percentage of full
scale. The flow of data to perform these calcula-
tions is shown in Figure 5. All of these measure-
ments begin when a start conversion command is
given. The energy and RMS registers are then up-
dated every N conversions (or 1 computation cy-
cle) where N is the content of the Cycle Count
register. After the computation cycle has finished,
the DRDY bit in the Status and Mask register is set.
The INT pin will also become active if the DRDY
bit is unmasked.
Table 1 provides an example detailing the output
linearity. A computation cycle is derived from the
master
clock
and
its
frequency
is
(MCLK/K)/(1024*N). Instantaneous calculations
are performed at a 4000 Hz rate where as, IRMS,
VRMS, and energy, are performed at a 1 Hz rate. Al-
so, DRDY is set only after computation cycles are
complete (i.e. there is no indicator flag to indicate
when the instantaneous conversions are read; how-
ever, if the Cycle Count register were set to 1, all
output calculations would be instantaneous and
DRDY would indicate when instantaneous calcula-
tions were finished).
VA+
VD+
CS5460
0.1 µF
100 µF
500 Ω
470 nF
500 Ω
N
R1
R2
RS
10 Ω
14
VIN+
9
VIN-
IIN-
10
16
15
IIN+
PFMON
CPUCLK
XOUT
XIN
Optional
Clock
Source
Serial
Data
Interface
RESET
17
2
1
24
19
CS
7
SDI
23
SDO
6
SCLK
5
INT
20
EDIR
22
EOUT
21
0.1 µF
VREFIN
12
VREFOUT
11
DGND
13
4
3
To Service
2.5 MHz to
20 MHz
0.1 µF
L 1
L 2
10 kΩ
5kΩ
VA-
RP
I
CP
I
CP
V
* Refer to Input Current Protection
*
*
*
Figure 4. Typical Connection Diagram (One-Phase 3-Wire)
Energy
Vrms
Irms
Range
1000:1
2:1
500:1
Max Input
See Analog Characteristics
Linearity
(After
Calibration)
0.1% of
reading
0.1% of
reading
0.1% of
reading
Output word
24-bits
Table 1. Specification with MCLK = 4.096 MHz, K = 1,
and N = 4000.



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