MIC2131 datasheet(9/20 Pages) MICREL

9 / 20 page

Micrel, Inc.

MIC2130/1

April 2008

M9999-042108-C

Theory of Operation

A voltage divider monitors the output voltage of the

converter then sensed at the inverting input of the error

amplifier. The non-inverting input of the error amplifier is

connected to the internal 0.7V reference and the two

inputs are compared to produce an analog error voltage.

This error voltage is then fed into the non-inverting input

of the PWM comparator and compared to the voltage

ramp (1.1V to 2.1V) to create the PWM pulses. The

PWM pulses propagate through to the MOSFET drivers

which drive the external MOSFETs to create the power

switching waveform at the set D (duty cycle). This is then

filtered by a power inductor and low ESR capacitor to

produce the output voltage where VOUT ≈ D*VIN. As an

example, due to a load increase or an input voltage

drop, the output voltage will instantaneously drop. This

will cause the error voltage to rise, resulting in wider

pulses at the output of the PWM comparator. The higher

Duty Cycle power switching waveform will cause an

associated rise in output voltage and will continue to rise

until the feedback voltage is equal to the reference and

the loop is again in equilibrium. As with any control

system, it is necessary to compensate this feedback

loop (by selecting the R and C values at the comp pin) in

order to keep the system stable. One of the tradeoffs for

stability is reduced transient regulation performance.

However, the MIC2130/31 has an additional feature to

correct this problem. The MIC2130/31 family features a

fast hysteretic control loop (FHyCL) which bypasses the

gm amp and the feedback compensation network during

fast line and load transients.

The fast hysteretic control loop (FHyCL) operates during

large transients to provide excellent line and load

regulation. Hysteretic mode is invoked when the output

voltage is detected to be ±6% of its regulated value. If

the input voltage step or output load step is large enough

to cause a 6% deviation in VOUT, then the additional

hysteretic control loop functions to return the output

voltage to its nominal set point in the fastest time

possible. This is limited only by the time constant of the

power inductor and output capacitor (an order of

magnitude faster than the gm loop). This scheme is not

used during normal operation because it creates

switching waveforms whose frequency is dependant on

VIN, passive component values and load current. Due to

its large noise spectrum it is only used during surges to

keep switching noise at a known, fixed frequency.

Figure 2. Hysteric Block Diagram

Figure 3. Hysteric Waveforms

Soft Start

Figure 4. Soft Start Circuit

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