M50LPW080N1G datasheet(7/44 Pages) STMICROELECTRONICS

tên linh kiện	M50LPW080N1G

Giải thích chi tiết về linh kiện	8 Mbit 1Mb x8, Uniform Block 3V Supply Low Pin Count Flash Memory

PDF	44 Pages

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M50LPW080

Figure 2. Logic Diagram (LPC Interface)

Figure 3. Logic Diagram (A/A Mux Interface)

Table 1. Signal Names (LPC Interface)

Table 2. Signal Names (A/A Mux Interface)

AI04426

LFRAME

LAD0-

LAD3

VCC

M50LPW080

CLK

VSS

TBL

INIT

ID0-ID1

GPI0-

GPI4

VPP

AI04427

DQ0-DQ7

VCC

M50LPW080

VSS

A0-A10

VPP

LAD0-LAD3

Input/Output Communications

LFRAME

Input Communication Frame

ID0-ID1

Identification Inputs

GPI0-GPI4

General Purpose Inputs

Interface Configuration

Interface Reset

INIT

CPU Reset

CLK

Clock

TBL

Top Block Lock

Write Protect

RFU

Reserved for Future Use. Leave

disconnected

VCC

Supply Voltage

VPP

Optional Supply Voltage for Fast

Erase Operations

VSS

Ground

Not Connected Internally

Interface Configuration

A0-A10

Address Inputs

DQ0-DQ7

Data Inputs/Outputs

Output Enable

Write Enable

Row/Column Address Select

Ready/Busy Output

Interface Reset

VCC

Supply Voltage

VPP

Optional Supply Voltage for Fast

Program and Fast Erase Operations

VSS

Ground

Not Connected Internally

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