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M41ST84W bảng dữ liệu(PDF) 14 Page - STMicroelectronics |
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M41ST84W bảng dữ liệu(HTML) 14 Page - STMicroelectronics |
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14 / 31 page ![]() M41ST84Y, M41ST84W 14/31 Data Retention Mode With valid VCC applied, the M41ST84Y/W can be accessed as described above with READ or WRITE cycles. Should the supply voltage decay, the M41ST84Y/W will automatically deselect, write protecting itself when VCC falls between VPFD(max) and VPFD(min). This is accomplished by internally inhibiting access to the clock regis- ters. At this time, the Reset pin (RST) is driven ac- tive and will remain active until VCC returns to nominal levels. When VCC falls below the Battery Back-up Switchover Voltage (VSO), power input is switched from the VCC pin to the SNAPHAT ® (or external) battery, and the clock registers and SRAM are maintained from the attached battery supply. All outputs become high impedance. On power up, when VCC returns to a nominal value, write protec- tion continues for tREC. The RST signal also re- mains active during this time (see Figure 16, page 14). For a further more detailed review of lifetime calcu- lations, please see Application Note AN1012. Figure 16. Power Down/Up Mode AC Waveforms Table 8. Power Down/Up AC Characteristics Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 2.7 to 3.6V or 4.5 to 5.5V (except where noted). 2. VPFD(max) to VPFD(min) fall time of less than tF may result in deselection/write protection not occurring until 200µs after VCC passes VPFD(min). 3. VPFD(min) to VSS fall time of less than tFB may cause corruption of RAM data. 4. Programmable (see Table 13, page 23) 5. At 25°C (when using SOH28 + M4T28-BR12SH SNAPHAT top); VCC = 0V. Symbol Parameter(1) Min Typ Max Unit tF (2) VPFD(max) to VPFD(min) VCC Fall Time 300 µs tFB (3) VPFD(min) to VSS VCC Fall Time 10 µs tPFD PFI to PFO Propagation Delay 15 25 µs tR VPFD(min) to VPFD(max) VCC Rise Time 10 µs tRB VSS to VPFD(min) VCC Rise Time 1µs tREC(4) Power up Deselect Time 40 200 ms tDR (5) Expected Data Retention Time 10 YEARS AI03681 VCC INPUTS (PER CONTROL INPUT) OUTPUTS DON'T CARE HIGH-Z tF tFB tR tRB tDR VALID VALID (PER CONTROL INPUT) RECOGNIZED RECOGNIZED VPFD (max) VPFD (min) VSO tREC RST PFO |
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