M36DR232B datasheet(6/46 Pages) STMICROELECTRONICS

tên linh kiện	M36DR232B

Giải thích chi tiết về linh kiện	32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 2 Mbit 128K x16 SRAM, Multiple Memory Product

PDF	46 Pages

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M36D232A, M36DR232B

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Table 3. Main Operation Modes

Note: X = VIL or VIH,VPPFH =12V ± 5%.

1. If UBS and LBS are tied together the bus is at 16 bit. For an 8 bit bus configuration use UBS and LBS separately.

Operation

Mode

RPF

WPF

VPPF

E1S

E2S

UBS,LBS (1)

DQ15-DQ0

Read

VIL

VIH

Don't care

SRAM must be disabled

Data

Output

Write

VIL

VIH

VIL

VIH

VCCF or

VPPFH

SRAM must be disabled

Data Input

Block

Locking

VIL

VIH

VIL

Don't care

SRAM must be disabled

Standby

VIH

Don't care

Any SRAM mode is allowable

Hi-Z

Reset

VIL

Don't care

Any SRAM mode is allowable

Hi-Z

Output

Disable

VIL

VIH

Don't care

Any SRAM mode is allowable

Hi-Z

Read

Flash must be disabled

VIL

VIH

VIL

VIH

VIL

Data out

Word Read

Write

Flash must be disabled

VIL

VIH

VIL

Data in

Word Write

Standby/

Power

Down

Any Flash mode is allowable

VIH

XXX

Hi-Z

VIL

Hi-Z

XXXX

VIH

Hi-Z

Data

Retention

Any Flash mode is allowable

VIH

XXX

Hi-Z

VIL

Hi-Z

XXXX

VIH

Hi-Z

Output

Disable

Any Flash mode is allowable

VIL

VIH

Hi-Z

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