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STR710FZ1 bảng dữ liệu(PDF) 61 Page - STMicroelectronics

tên linh kiện STR710FZ1
Giải thích chi tiết về linh kiện  ARM7TDMI??32-bit MCU with Flash, USB, CAN 5 timers, ADC, 10 communications interfaces
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STR710FZ1 bảng dữ liệu(HTML) 61 Page - STMicroelectronics

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STR71xF
Electrical parameters
61/78
Notes:
1.
Data based on standard I2C protocol requirement, not tested in production.
2.
The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the
undefined region of the falling edge of SCL.
3.
The maximum hold time th(SDA) is not applicable.
4.
Measurement points are done at CMOS levels: 0.3xVDD and 0.7xVDD.
5.
fPCLK1, must be at least 8 MHz to achieve max fast I
2C speed (400 kHz).
6.
The following table gives the values to be written in the I2CCCR register to obtain the required I2C SCL line
frequency.
Table 36.
I2C characteristics
Symbol
Parameter
Standard mode
I2C
Fast mode I2C5)
Unit
Min 1)
Max 1)
Min 1)
Max 1)
tw(SCLL)
SCL clock low time
4.7
1.3
µs
tw(SCLH)
SCL clock high time
4.0
0.6
tsu(SDA)
SDA setup time
250
100
ns
th(SDA)
SDA data hold time
0 3)
0 2)
900 3)
tr(SDA)
tr(SCL)
SDA and SCL rise time
1000
20+0.1Cb
300
tf(SDA)
tf(SCL)
SDA and SCL fall time
300
20+0.1Cb
300
th(STA)
START condition hold time
4.0
0.6
µs
tsu(STA)
Repeated START condition setup
time
4.7
0.6
tsu(STO)
STOP condition setup time
4.0
0.6
µs
tw(STO:STA)
STOP to START condition time (bus
free)
4.7
1.3
µs
Cb
Capacitive load for each bus line
400
400
pF



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