UT54LVDS217 datasheet(2/14 Pages) AEROFLEX

2 / 14 page

PIN DESCRIPTION

Figure 2. UT54LVDS217 Pinout

UT54LVDS217

N/C

LVDS GND

TxIN4

VDD

GND

VDD

TxIN6

TxIN5

TxIN7

TxIN8

TxIN9

TxIN10

GND

TxIN11

TxIN12

VDD

TxIN13

TxIN14

TxIN15

TxIN17

TxIN16

VDD

TxIN19

TxIN18

GND

TxIN3

TxIN2

GND

TxIN1

TxIN0

TxOUT0-

TxOUT0+

TxOUT1-

LVDS GND

TxCLK OUT-

TxOUT1+

TxOUT2-

LVDS VDD

TxOUT2+

PWR DWN

TxCLK IN

TxIN20

TxCLK OUT+

LVDS GND

PLL GND

PLL VDD

PLL GND

Pin Name

I/O

No.

Description

TxIN

TTL level input

TxOUT+

Positive LVDS differential data output

TxOUT-

Negative LVDS differential data output

TxCLK IN

TTL level clock input. The rising edge acts

as data strobe. Pin name TxCLK IN

TxCLK

OUT+

Positive LVDS differential clock output

TxCLK OUT-

Negative LVDS differential clock output

PWR DWN

TTL level input. Assertion (low input) TRI-

STATEs the clock and data outputs, ensur-

ing low current at power down.

VDD

Power supply pins for TTL inputs and logic

GND

Ground pins for TTL inputs and logic

PLL VDD

Power supply pins for PLL

PLL GND

Ground pins for PPL

LVDS VDD

Power supply pin for LVDS output

LVDS GND

Ground pins for LVDS outputs

TxIN

UT54LVDS217

CMOS/

TTL

TxCLK

PCB

RxOUT

UT54LVDS218

RxCLK

PCB

SHIELD

GND

CLOCK

(LVDS)

DATA

(LVDS)

LVDS CABLE

MEDIA DEPENDENT

Figure 3. UT54LVDS217 Typical Application

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