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M45PE40-VMP6TP bảng dữ liệu(PDF) 30 Page - Numonyx B.V

tên linh kiện M45PE40-VMP6TP
Giải thích chi tiết về linh kiện  4 Mbit, low voltage, Page-Erasable Serial Flash memory with byte-alterability and a 50 MHz SPI bus interface
PDF  46 Pages
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M45PE40-VMP6TP bảng dữ liệu(HTML) 30 Page - Numonyx B.V

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Instructions
M45PE40
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6.12
Release from Deep Power-down (RDP)
Once the device has entered the Deep Power-down mode, all instructions are ignored
except the Release from Deep Power-down (RDP) instruction. Executing this instruction
takes the device out of the Deep Power-down mode.
The Release from Deep Power-down (RDP) instruction is entered by driving Chip Select (S)
Low, followed by the instruction code on Serial Data Input (D). Chip Select (S) must be
driven Low for the entire duration of the sequence.
The instruction sequence is shown in Figure 17.
The Release from Deep Power-down (RDP) instruction is terminated by driving Chip Select
(S) High. Sending additional clock cycles on Serial Clock (C), while Chip Select (S) is driven
Low, cause the instruction to be rejected, and not executed.
After Chip Select (S) has been driven High, followed by a delay, tRDP, the device is put in the
Standby Power mode. Chip Select (S) must remain High at least until this period is over. The
device waits to be selected, so that it can receive, decode and execute instructions.
Any Release from Deep Power-down (RDP) instruction, while an Erase, Program or Write
cycle is in progress, is rejected without having any effects on the cycle that is in progress.
Figure 17.
Release from Deep Power-down (RDP) instruction sequence
C
D
AI06807
S
2
1
34567
0
tRDP
Standby Mode
Deep Power-down Mode
Q
High Impedance
Instruction



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