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M25PE80-VMP6TP bảng dữ liệu(PDF) 52 Page - Numonyx B.V

tên linh kiện M25PE80-VMP6TP
Giải thích chi tiết về linh kiện  8-Mbit, page-erasable serial flash memory with byte alterability, 75 MHz SPI bus, standard pinout
PDF  66 Pages
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M25PE80-VMP6TP bảng dữ liệu(HTML) 52 Page - Numonyx B.V

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DC and AC parameters
M25PE80
52/66
Table 22.
AC characteristics
Test conditions specified in Table 17 and Table 18
Symbol
Alt.
Parameter
Min
Typ
Max
Unit
fC
fC
Clock frequency for the following
instructions: FAST_READ, RDLR, PW,
PP, WRLR, PE, SE, DP, RDP, WREN,
WRDI, RDSR
D.C.
50
MHz
fR
Clock frequency for read instructions
D.C.
20
MHz
tCH
(1)
1.
tCH + tCL must be greater than or equal to 1/ fC.
tCLH
Clock high time
9
ns
tCL
(1)
tCLL
Clock low time
9
ns
Clock slew rate(2) (peak to peak)
2.
Value guaranteed by characterization, not 100% tested in production.
0.1
V/ns
tSLCH
tCSS
S active setup time (relative to C)
5
ns
tCHSL
S not active hold time (relative to C)
5
ns
tDVCH
tDSU
Data in setup time
2
ns
tCHDX
tDH
Data in hold time
5
ns
tCHSH
S active hold time (relative to C)
5
ns
tSHCH
S not active setup time (relative to C)
5
ns
tSHSL
tCSH
S deselect time
100
ns
tSHQZ
(2)
tDIS
Output disable time
8
ns
tCLQV
tV
Clock low to output valid
8
ns
tCLQX
tHO
Output hold time
0
ns
tTHSL
Top sector lock setup time
50
ns
tSHTL
Top sector lock hold time
100
ns
tDP
(2)
S to deep power-down
3
µs
tRDP
(2)
S high to standby mode
30
µs
tPW
(3)
3.
When using PP and PW instructions to update consecutive bytes, optimized timings are obtained with one
sequence including all the bytes versus several sequences of only a few bytes (1
≤ n ≤ 256).
Page write cycle time (256 bytes)
11
25
ms
Page write cycle time (n bytes)
10.1 +
n * 0.9/256
tPP
(3)
Page program cycle time (256 bytes)
1.35
5ms
Page program cycle time (n bytes)
0.45 +
n * 0.9/256
tPE
Page erase cycle time
10
20
ms
tSE
Sector erase cycle time
1
5
s
tBE
Bulk erase cycle time
10
60
s



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