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M25PE16-VMP6TP bảng dữ liệu(PDF) 45 Page - Numonyx B.V

tên linh kiện M25PE16-VMP6TP
Giải thích chi tiết về linh kiện  16-Mbit, page-erasable serial flash memory with byte-alterability, 75 MHz SPI bus, standard pinout
PDF  58 Pages
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nhà sản xuất  NUMONYX [Numonyx B.V]
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M25PE16-VMP6TP bảng dữ liệu(HTML) 45 Page - Numonyx B.V

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M25PE16
Reset
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8
Reset
Driving Reset (Reset) Low while an internal operation is in progress will affect this operation
(write, program or erase cycle) and data may be lost.
All the lock bits are reset to 0 after a Reset Low pulse.
Table 12 shows the status of the device after a Reset Low pulse.
9
Initial delivery state
The device is delivered with the memory array erased: all bits are set to ‘1’ (each byte
contains FFh). All usable status register bits are 0.
Table 12.
Device status after a Reset Low pulse
Conditions:
reset pulse occurred
Lock bits status
Internal logic
status
Addressed data
While decoding an instruction(1): WREN,
WRDI, RDID, RDSR, READ, RDLR,
Fast_Read, WRLR, PW, PP, PE, SE, BE,
SSE, DP, RDP
1.
S remains Low while Reset is Low.
Reset to 0
Same as POR
Not significant
Under completion of an Erase or Program
cycle of a PW, PP, PE, SSE, SE, BE
operation
Reset to 0
Equivalent to
POR
Addressed data
could be modified
Under completion of a WRSR operation
Reset to 0
Equivalent to
POR (after tW)
Write is correctly
completed
Device deselected (S High) and in standby
mode
Reset to 0
Same as POR
Not significant



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