STM32F101X8 datasheet(52/74 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32F101xx

52/74

5.3.14

TIM timer characteristics

The parameters given in Table 37 are guaranteed by fabrication.

Refer to Section 5.3.12: I/O port characteristics for details on the input/output alternate

function characteristics (output compare, input capture, external clock, PWM output).

5.3.15

Communications interfaces

I2C interface characteristics

Unless otherwise specified, the parameters given in Table 38 are derived from tests

performed under ambient temperature, fPCLK1 frequency and VDD supply voltage conditions

summarized in Table 7.

The STM32F101xx access line I2C interface meets the requirements of the standard I2C

communication protocol with the following restrictions: the I/O pins SDA and SCL are

mapped to are not “true” open-drain. When configured as open-drain, the PMOS connected

between the I/O pin and VDD is disabled, but is still present.

The I2C characteristics are described in Table 38. Refer also to Section 5.3.12: I/O port

characteristics for more details on the input/output alternate function characteristics (SDA

and SCL).

Table 37.

TIMx(1) characteristics

TIMx is used as a general term to refer to the TIM1, TIM2, TIM3 and TIM4 timers.

Symbol

Parameter

Conditions

Min

Max

Unit

tres(TIM)

Timer resolution time

tTIMxCLK

fTIMxCLK = 36 MHz

27.8

fEXT

Timer external clock

frequency on CH1 to CH4

fTIMxCLK/2

MHz

fTIMxCLK = 36 MHz

018

MHz

ResTIM

Timer resolution

bit

tCOUNTER

16-bit counter clock period

when internal clock is

selected

65536

tTIMxCLK

fTIMxCLK = 36 MHz 0.0278

1820

µs

tMAX_COUNT Maximum possible count

65536 × 65536

tTIMxCLK

fTIMxCLK = 36 MHz

119.2

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