USB2524 datasheet(42/57 Pages) SMSC

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USB MultiSwitchTM Hub

Datasheet

Revision 1.91 (08-22-07)

SMSC USB2524

DATASHEET

A Block Read differs from a block write in that the repeated start condition exists to satisfy the I2C

specification's requirement for a change in the transfer direction.

Figure 7.2 SMBus Block Read

7.3.2

Invalid Protocol Response Behavior

Registers that are accessed with an invalid protocol are not updated. A register is only updated

following a valid protocol. The only valid protocols are Write Block and Read Block, which are

described above.

The Hub only responds to the hardware selected Slave Address. Attempting to communicate with the

Hub over SMBus with an invalid slave address or invalid protocol results in no response, and the

SMBus Slave Interface returns to the idle state. The only valid registers that are accessible by the

SMBus slave address are the registers defined in the Registers Section. See Undefined Registers for

the response to undefined registers.

7.3.3

General Call Address Response

The Hub does not respond to a general call address of 0000_000b.

7.3.4

Slave Device Time-Out

According to the SMBus Specification, V1.0 devices in a transfer can abort the transfer in progress

and release the bus when any single clock low interval exceeds 25ms (TTIMEOUT, MIN). Devices that

have detected this condition must reset their communication and be able to receive a new START

condition no later than 35ms (TTIMEOUT, MAX).

Note: Some simple devices do not contain a clock low drive circuit; this simple kind of device typically

resets its communications port after a start or stop condition. The Slave Device Time-Out must

be implemented.

7.3.5

Stretching the SCLK Signal

The Hub supports stretching of the SCLK by other devices on the SMBus. The Hub does not stretch

the SCLK.

7.3.6

SMBus Timing

The SMBus Slave Interface complies with the SMBus AC Timing Specification. See the SMBus timing

in the “Timing Diagram” section.

Block Read

Slave Address

Byte Count = N

Data byte 1

Data byte 2

Data byte N

...

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