CY27EE16ZE
Document #: 38-07440 Rev. *C
Page 12 of 17
Serial Programming Interface Timing
Thermal Land Pad on PWB: Layout
Requirement for 20-lead Exposed Pad TSSOP
In order to achieve power dissipation and maintain junction
temperature within specified limits there must be an exposed
landing pad placed under the package, and the exposed pad
on the bottom of the package must be soldered to this landing
pad. This is typically achieved by placing a dense array of
thermal via that connects the landing pad to the ground plane.
In order to meet the power dissipation specification of 40 °C/W,
Amkor soldered the exposed pad to a thermal land pad, and
placed thermal via on a 1.2-mm pitch (x and y) in the thermal
land pad. For more information about this package, see,
“Application Notes for Surface Mount Assembly of Amkor’s
Thermally/Electrically
Enhanced
Leadframe
Based
Packages.” Amkor Technology, December 2001.
Figure 6. Start and Stop Frame
Figure 7. Frame Format (Device Address, R/W, Register Address, Register Data)
SDAT
SCLK
START
Transition
to next Bit
STOP
SDAT
SCLK
DA6
DA5 DA0
R/W
ACK
RA7
RA6 RA1
RA0
ACK
STOP
START
ACK
D7
D6
D1
D0
++
+
+
+
+
Table 14.Pullable Crystal Specifications
Parameter
Description
Min.
Typ.
Max.
Unit
CRYSTALLoad
Load Capacitance
14
pF
C0/C1
240
ESR
35
W
To
Operating Temperature (Commercial)
0
70
°C
To
Operating Temperature (Industrial)
–40
85
°C
Accinit
Initial Accuracy
±30
ppm
Stability
Temperature plus Aging Stability
±80
ppm
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