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STM32L4P5CEI3P bảng dữ liệu(PDF) 41 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 150 DMIPS, up to 1-MB Flash memory, 320-KB SRAM, LCD-TFT, ext. SMPS
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STM32L4P5CEI3P bảng dữ liệu(HTML) 41 Page - STMicroelectronics

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DS12903 Rev 2
41/311
STM32L4P5xx
Functional overview
64
Figure 6. Multi-AHB bus matrix
3.13
Direct memory access controller (DMA)
The device embeds 2 DMAs. Refer to Table 7: DMA implementation for the features
implementation.
Direct memory access (DMA) is used in order to provide a high-speed data transfer
between peripherals and memory as well as from memory to memory. Data can be quickly
moved by DMA without any CPU actions. This keeps the CPU resources free for other
operations.
The two DMA controllers have 14 channels in total, each one dedicated to manage memory
access requests from one or more peripherals. Each controller has an arbiter for handling
the priority between DMA requests.
MSv61127V1
Cortex
®-M4
with FPU
DMA1
DMA2
FSMC
AHB2
peripherals
AHB1
peripherals
SRAM2
SRAM1
FLASH
2 MB
ICode
DCode
OCTOSPI2
DMA2D
BusMatrix-S
LCD-TFT
SDMMC1
SDMMC2
SRAM3
OCTOSPI1



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