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243 / 311 page ![]() DS12903 Rev 2 243/311 STM32L4P5xx Electrical characteristics 277 SAI characteristics Unless otherwise specified, the parameters given in Table 97 for SAI are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage condi- tions summarized inTable 21: General operating conditions, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 10 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5 x VDD Refer to Section 6.3.14: I/O port characteristics for more details on the input/output alternate function characteristics (CK,SD,FS). Table 97. SAI characteristics(1) Symbol Parameter Conditions Min Max Unit fMCLK SAI Main clock output - - 50 MHz fCK SAI clock frequency(2) Master transmitter 2.7 ≤ VDD ≤ 3.6 Voltage Range V1 -30 Master transmitter 1.71 ≤ VDD ≤ 3.6 Voltage Range V1 -20 Master receiver Voltage Range V1 -15 Slave transmitter 2.7 ≤ VDD ≤ 3.6 Voltage Range V1 -38 Slave transmitter 1.71 ≤ VDD ≤ 3.6 Voltage Range V1 -26 Slave receiver Voltage Range V1 -50 Voltage Range V2 - 13 1.08V<VDD< 1.32V - 8 tv(FS) FS valid time Master mode 2.7 ≤ VDD ≤ 3.6 -15 ns Master mode 1.71 ≤ VDD ≤ 3.6 -22 th(FS) FS hold time Master mode 22 - tsu(FS) FS setup time Slave mode 2.5 - th(FS) FS hold time Slave mode 1 - tsu(SD_A_MR) Data input setup time Master receiver 3 - tsu(SD_B_SR) Slave receiver 1 - th(SD_A_MR) Data input hold time Master receiver 3.5 - th(SD_B_SR) Slave receiver 1.5 - |
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