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DS1374 bảng dữ liệu(PDF) 13 Page - Maxim Integrated Products |
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DS1374 bảng dữ liệu(HTML) 13 Page - Maxim Integrated Products |
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13 / 17 page ![]() I2C, 32-Bit Binary Counter Watchdog RTC with Tickle Charger and Reset Input/Output ____________________________________________________________________ 13 Status Register (08h) Bit 7/Oscillator Stop Flag (OSF). A logic 1 in this bit indicates that the oscillator either is stopped or was stopped for some period of time and can be used to judge the validity of the timekeeping data. This bit is set to logic 1 any time the oscillator stops. The following are examples of conditions that can cause the OSF bit to be set: 1) The first time power is applied. 2) The voltage present on both VCC and VBACKUP are insufficient to support oscillation. 3) The EOSC bit is turned off. 4) External influences on the crystal (i.e., noise, leak- age, etc.). This bit remains at logic 1 until written to logic 0. Bit 0/Alarm Flag (AF). A logic 1 in the alarm flag bit indicates that the WD/ALM counter reached zero. If WD/ALM is set to zero and the AIE bit = 1, the INT pin goes low and stays low until AF is cleared. AF is cleared when written to logic 0. This bit can only be written to logic 0. Attempting to write logic 1 leaves the value unchanged. If WD/ALM is set to 1 and the AIE bit = 1, the INT pin pulses low for 250ms when the WD/ALM counter reaches zero and sets AF = 1. At the pulse completion, the DS1374 clears the AF bit to zero. If the 250ms pulse is active, writing AF to zero does not truncate the pulse. Trickle-Charge Register (10h) The simplified schematic in Figure 7 shows the basic components of the trickle charger. The trickle-charge select (TCS) bits (bits 4–7) control the selection of the trickle charger. To prevent accidental enabling, only a pattern of 1010 enables the trickle charger. All other patterns disable the trickle charger. The trickle charger is disabled when power is first applied. The diode select (DS) bits (bits 2, 3) select whether or not a diode is connected between VCC and VBACKUP. If DS is 01, no diode is selected; if DS is 10, a diode is selected. The ROUT bits (bits 0, 1) select the value of the resistor connected between VCC and VBACKUP. Table 5 shows the resistor selected by the resistor select (ROUT) bits and the diode selected by the diode select (DS) bits. Warning: The ROUT value of 250 Ω must not be select- ed whenever VCC is greater than 3.63V. The user determines diode and resistor selection according to the maximum current desired for battery or super cap charging. The maximum charging current can be calculated as illustrated in the following example. Assume that a system power supply of 3.3V is applied to VCC and a super cap is connected to VBACKUP. Also assume the trickle charger has been enabled with a diode and resistor R2 between VCC and VBACKUP. The maximum current IMAX would therefore be calculated as follows: IMAX = (3.3V - diode drop) / R2 ≈ (3.3V - 0.7V) / 2kΩ≈ 1.3mA As the super cap changes, the voltage drop between VCC and VBACKUP decreases and therefore the charge current decreases. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 OSF 0 0 00 00 AF TCS3 TCS2 TCS1 TCS0 DS1 DS0 ROUT1 ROUT0 FUNCTION XX XX 00 XX Disabled XX XX 11 XX Disabled XX X XXX0 0 Disabled 10 1 001 01 No diode, 250 Ω resistor 10 1 010 01 One diode, 250 Ω resistor 10 1 001 10 No diode, 2k Ω resistor 10 1 010 10 One diode, 2k Ω resistor 10 1 001 11 No diode, 4k Ω resistor 10 1 010 11 One diode, 4k Ω resistor 00 0 000 00 Power-on reset value Table 5. Trickle Charge Register |
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