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MPF0900AMMA2ES bảng dữ liệu(PDF) 123 Page - NXP Semiconductors |
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MPF0900AMMA2ES bảng dữ liệu(HTML) 123 Page - NXP Semiconductors |
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123 / 205 page ![]() NXP Semiconductors PF09 Nine-channel power management IC with advanced system safety monitoring OTP_SWx_UVTH[2:0] UV threshold 100 95.5% 101 95.0% 110 94.5% 111 94.0% Table 156. SWx UV threshold configuration bits...continued The overvoltage (OV) monitoring threshold for the switching regulators is set in the OTP registers via the OTP_SWx_OVTH[2:0] bits. OTP_SWx_OVTH[2:0] OV threshold 000 102.5% 001 103.0% 010 103.5% 011 104.0% 100 104.5% 101 105.0% 110 105.5% 111 106.0% Table 157. SWx OV threshold configuration bits For safety considerations, the OV/UV monitoring thresholds are selected in OTP during the part number configuration phase, and they are not allowed to be changed during system operation. However, the system can choose to open the monitoring range during the Monitored STANDBY state, to accommodate larger DC/AC output voltage accuracy on the SWx regulators due to the PFM operation. The SWx_UVTH_STBY and SWx_OVTH_STBY bits are provided to select whether to use the same OV/UV monitoring threshold in RUN and STANDBY states or force the maximum OV/UV monitoring threshold during the STANDBY state. SWx_UVTH_STBY UV threshold in STANDBY 0 Same as RUN state 1 Open to maximum threshold Table 158. SWx UV threshold configuration bits during STANDBY SWx_OVTH_STBY OV threshold in STANDBY 0 Same as RUN state 1 Open to maximum threshold Table 159. SWx OV threshold configuration bits during STANDBY By default, the SWx_UVTH_STBY and SWx_OVTH_STBY bits are set to 1 at power up, and the MCU can modify their values before requesting access to the STANDBY states. The undervoltage monitoring threshold for the LDO regulators is set in the OTP registers via the OTP_LDOx_UVTH[2:0] bits. PF09 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 1.3 — 16 December 2025 Document feedback 123 / 205 |
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