MPF0900AMMA2ES datasheet(40/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

Regardless of which type of reset event is generated, if the FS0B pin is operating in active Safe-state mode, the

FS0B pin will be asserted low and remain low through the reset event until the MCU is able to release the pin

via the I2C command.

12.4.2.1 Hard reset

During a Hard reset, the RSTB signal will be asserted as all system regulators, GPOx and VMONs are powered

down as indicated in the power down sequence.

The following events can generate a hard reset:

• A watchdog failure

• The PWRON pin used in edge-sensitive mode with the PWRON_RST_EN = 1

• A software reset via the SYS_CMD register

• The FCCU1 pin operating in XRESET mode with the XRST_MODE = 0

• The FCCU failure with the FCCUx_RESET = 10

• The ERRMON failure when ERRMON_RESET = 1

If the VAON is set as an always-on regulator, the PF09 uses the VAON_RESET_EN bit to choose whether the

VAON output is included in the RESET event or not.

VAON_RESET_EN

VAON always-on reset reaction

VAON Reset disabled

VAON Reset enabled

Table 34. VAON always-on reset reaction

By default, the VAON_RESET_EN bit is reset to 0 at power up. The MCU must set this bit during the MCU boot-

up sequence if the VAON is required to perform a reset together with the rest of the system regulators when the

reset event is present.

During a hard reset event, if the VAON is set as a system regulator, the VAON regulator is disabled as defined

in the power-down sequence.

When a hard reset condition is present, the device will clear all the interrupt latches before starting the new

power-up sequence, to allow the device to release and assert the INTB pin when the PWRUP_I is latched upon

power-up sequence.

12.4.2.2 Soft reset

The following events can generate a soft reset:

• The XRESET input (FCCU1 pin) with XRST_MODE = 1

• An FCCU failure with the FCCUx_RESET [1:0] = 01

When the VAON is set as an always-on regulator, the soft reset does not have any impact on this regulator.

If the VAON is set as a system regulator, the VAON_RESET_EN bit will set the behavior of the VAON during a

soft reset event.

VAON_RESET_EN

Soft reset impact

VAON ignores the soft reset

VAON reloads default configuration

Table 35. Soft reset impact

PF09

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 16 December 2025

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