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STM32F301C6U6 bảng dữ liệu(PDF) 89 Page - STMicroelectronics |
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STM32F301C6U6 bảng dữ liệu(HTML) 89 Page - STMicroelectronics |
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89 / 141 page ![]() DS9895 Rev 8 89/141 STM32F301x6 STM32F301x8 Electrical characteristics 115 Output driving current The GPIOs (general purpose input/outputs) can sink or source up to +/-8 mA, and sink or source up to +/- 20 mA (with a relaxed VOL/VOH). In the user application, the number of I/O pins which can drive current must be limited to respect the absolute maximum rating specified in Section 6.2: • The sum of the currents sourced by all the I/Os on VDD, plus the maximum Run consumption of the MCU sourced on VDD, cannot exceed the absolute maximum rating ΣIVDD (see Table 21). • The sum of the currents sunk by all the I/Os on VSS plus the maximum Run consumption of the MCU sunk on VSS cannot exceed the absolute maximum rating ΣIVSS (see Table 21). Output voltage levels Unless otherwise specified, the parameters given in Table 54 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 23. All I/Os (FT, TTa and TC unless otherwise specified) are CMOS and TTL compliant. Table 54. Output voltage characteristics Symbol Parameter Conditions Min Max Unit VOL(1) Output low level voltage for an I/O pin CMOS port(2) IIO = +8 mA 2.7 V < VDD < 3.6 V -0.4 V VOH(3) Output high level voltage for an I/O pin VDD–0.4 - VOL (1) Output low level voltage for an I/O pin TTL port(2) IIO = +8 mA 2.7 V < VDD < 3.6 V -0.4 VOH (3) Output high level voltage for an I/O pin 2.4 - VOL(1)(4) Output low level voltage for an I/O pin IIO = +20 mA 2.7 V < VDD < 3.6 V -1.3 VOH(3)(4) Output high level voltage for an I/O pin VDD–1.3 - VOL(1)(4) Output low level voltage for an I/O pin IIO = +6 mA 2 V < VDD < 2.7 V -0.4 VOH(3)(4) Output high level voltage for an I/O pin VDD–0.4 - VOLFM+(1)(4) Output low level voltage for an FTf I/O pin in FM+ mode IIO = +20 mA 2.7 V < VDD < 3.6 V -0.4 1. The IIO current sunk by the device must always respect the absolute maximum rating specified in Table 21 and the sum of IIO (I/O ports and control pins) must not exceed ΣIIO(PIN). 2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52. 3. The IIO current sourced by the device must always respect the absolute maximum rating specified in Table 21 and the sum of IIO (I/O ports and control pins) must not exceed ΣIIO(PIN). 4. Data based on design simulation. |
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