25CS160 datasheet(11/53 Pages) MICROCHIP

11 / 53 page

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Preliminary

DS20007008B-page 11

25CS160

1.2

Device Default State

1.2.1

POWER-UP DEFAULT STATE

The 25CS160 default state upon power-up consists of:

• Standby power mode (CS =HIGH)

• A high-to-low-level transition on CS, which is

required to enter active state

• Write Enable Latch (WEL) bit in the STATUS

• Error Correction State Latch (ECS) bit in the

STATUS register = 0

• Write Lockout State (WLS) bit in the STATUS

• Ready/Busy (RDY/BUSY) bit in the STATUS

indicating the device is ready to

accept a new instruction

1.2.2

DEVICE FACTORY DEFAULT

CONDITION

The 25CS160 is shipped to the customer with the

EEPROM array set to an all FFh data pattern

(logic ‘1’ state).

The Security register contains a preprogrammed,

128-bit serial number in the lower 16 bytes. The

user-programmable portion (lockable ID page) is

unlocked and is set to logic ‘1’, resulting in 32 bytes of

FFh data.

In the various device registers, the following

nonvolatile bits are set:

• Write Protection Enable (WPEN) bit in the

STATUS register is set to logic ‘0’ to allow writing

to the STATUS register (see Table 1-5)

• Block Write-Protect (BP[1:0]) bits in the STATUS

set when in Legacy mode (see Table 1-5)

• Undervoltage Lockout Detection (UVLO) register

is set to 00h, indicating that the UVLO function is

not enabled and the undervoltage lockout

detection level (VUVL) is set to the minimum level

(see Table 1-7)

TABLE 1-5:

STATUS REGISTER BITS – BYTE 0 (FACTORY DEFAULT)

TABLE 1-6:

STATUS REGISTER BITS – BYTE 1 (FACTORY DEFAULT)

TABLE 1-7:

UNDERVOLTAGE LOCKOUT DETECTION REGISTER (FACTORY DEFAULT)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

WPEN

Reserved

BP1

BP0

WEL(1)

RDY/BUSY(1)

00000

Note 1: These bits are volatile and are reset to this value upon power-up.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reserved

ECS(1)

Reserved

WLS(1)

Reserved

RDY/BUSY(1)

00000

Note 1: These bits are volatile and are reset to this value upon power-up.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reserved

UVLOEN

VUVL4

VUVL3

VUVL2

VUVL1

VUVL0

00000000

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