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L6223 bảng dữ liệu(PDF) 10 Page - STMicroelectronics

tên linh kiện L6223
Giải thích chi tiết về linh kiện  DMOS PROGRAMMABLE HIGH SPEED UNIPOLAR STEPPER MOTOR DRIVER
PDF  33 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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L6223 bảng dữ liệu(HTML) 10 Page - STMicroelectronics

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The output DMOS is ON
when the corrisponding in-
put is low
Operating Mode
The bit C5 defines the two available input configu-
rations.
C5 = H: FULL MODE OPERATING
The digital inputs have the following functions:
• IN1 drives OUT1
• IN2 drives OUT2
• IN3 drives OUT3
• IN4 drives OUT4
• DA/CLEV enables the current reduction
(see Tab 2)
• DA/OPLO selects the motor current control
mode (open or close loop).
Since each input drives one phase of the motor it
is possible to work either in Half Step or in Full
Step mode. DA/OPLO defines the current control
mode as follow:
– DA/OPLO = H open loop
– DA/OPLO = L closed loop
The reduced current level is enabled by the inputs
IN1, IN2, IN3, IN4 or by DA/CLEV (Tab. 2). The
reduced current value depends from the bits C0,
C1 (TAB. 5). The outputs are disabled when the
inputs are in a prohibited state (Tab. 4).
C5 = L, SIMPLIFIED MODE OPERATING
When in SIMPLIFIED MODE OPERATING the in-
puts assume the following functions:
• IN1 drives Phase A
• IN2 drives Phase B
• IN3 ENABLE input (active High)
• IN4 enables the reduced current (Tab. 3)
• DA/CLEV enables the reduced current (Tab. 3)
• DA/OPLO selects the motor current control
mode
The SIMPLIFIED MODE OPERATING configura-
tion does not allow the drive of a unipolar motor in
Half step.
The signal DA/OPLO functions as in FULL Mode
Operation. When the current control is imple-
mented in closed loop, the reduced current level
is enabled by the inputs IN4, DA/CLEV (Tab. 3).
The current reduction depends from the bits C0,
C1 (Tab. 5).
Open/Closed Loop Motor Current Control
The logic input DA/OPLO selects the current con-
trol mode as previously seen. When in open loop,
the chopping frequency is that one as defined by
the external RC network. In open loop are avail-
able three different t(ON), depending from the bits
C2, C3 (Tab. 6), as a percentage of the RC dis-
charge time t(dis).
When in closed loop two different chopping fre-
quencies are selectable by means of the bit C4
(Tab. 7). The higher is defined by the external RC
network. The other one is exactely the half. In
closed loop 5 different current levels are avail-
able: the nominal current level and four reduced
current levels (Tab. 5). The nominal current level
is set by an internal reference voltage of 0.5V.
The configuration of bits C0, C1 sets the refer-
ence voltage to a pecentage of the nominal value.
TRUTH TABLES (L = Low; H = High; X = don’t
care)
Table 2
IN1
IN2
IN3
IN4
DA/CLEV
C/R*
HHX
X
X
H
XXH
H
X
H
H
HHH
X
H
X
XXX
H
H
*) C/R = H, reduced current
Table 3
IN4
DA/CLEV
C/R
LX
H*
XH
H*
H
L
L**
*) Reduced current **) Nominal current
Table 4
IN1
IN2
IN3
IN4
Output Stage
L
L
X
X
DISABLED
X
X
L
L
DISABLED
Table 5
C0
C1
Reduced Current Level (*)
L
L
40%
L
H
50%
H
L
70%
H
H
85%
*) Nominal level percentage
L6223
10/33



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